Abstract: An organic EL display (1) has a bend (B) where a slit (81) is bored in a base coat film (23), gate insulating film (27), first interlayer insulating film (31) and second interlayer insulating film (35). The bend is provided with a filler layer (83) filling the slit and covering both edges of the slit. The filler layer has a protrusion (85) overlapping each edge in the width direction of the slit. A routed wire (7) routed from the display region (D) and then routed over the filler layer to reach a terminal section (T) extends over the protrusion.

Abstract: A display device includes: a plurality of control lines; a plurality of power supply lines; a plurality of data signal lines; an oxide semiconductor layer; a first metal layer; a gate insulation film; a first inorganic insulation film; a second metal layer; a second inorganic insulation film; and a third metal layer. The oxide semiconductor layer, in a plan view, contains therein semiconductor lines formed as isolated regions between a plurality of drivers and a display area. The semiconductor lines cross the plurality of control lines and the plurality of power supply lines, are in contact with the plurality of control lines via an opening in a gate insulation film, are in contact with the plurality of power supply lines via an opening in the first inorganic insulation film, and have a plurality of narrowed portions, such that thicker and thinner regions exist along the same line.

Abstract: A first conductive layer in the same layer as that of a first electrode is coupled to a third conductive layer and a second electrode in the same layer as that of a third metal layer through a slit formed in a flattening film of a non-display area. Second conductive layers in the same layer as that of a second metal layer are provided to overlap with the slit.

Abstract: There is provided a technique that includes: a first processing module including a first process container in which at least one substrate is processed, a first utility system including a first supply system which supplies a first processing gas into the first process container and a surface of the first utility system is connected or arranged close to the first processing module; and a first vacuum pump arranged at the same level as a first exhaust port of the first process container. The first vacuum pump exhausts an inside of the first process container and includes a first intake port formed laterally at a position substantially facing the first exhaust port of the first process container. A first exhaust pipe configured to substantially linearly bring the first exhaust port into fluid communication with the first intake port and including a first valve installed in a flow path.

Abstract: An integrated circuit includes first and second coils, a first pad connected to the first coil and to a resonator, a second pad connected to the second coil and to the resonator, and first and second output terminals. The first pad is arranged to provide signals between the resonator and the first coil. The second pad is arranged to provide signals between the resonator and the second coil. A distance between the first pad and the first coil is less than a distance between the first coil and the first output terminal and a distance between the first coil and the second output terminal. A distance between the second pad and the second coil is less than a distance between the second coil and the first output terminal and a distance between the second coil and the second output terminal.

Abstract: An oscillation module includes: an oscillation circuit; a multiplication circuit which is provided at a stage subsequent to the oscillation circuit and is operated by differential motion; and an output circuit which is provided at a stage subsequent to the multiplication circuit.

Abstract: An integrated circuit includes first and second coils, a first pad connected to the first coil and to a resonator, a second pad connected to the second coil and to the resonator, and first and second output terminals. The first pad is arranged to provide signals between the resonator and the first coil. The second pad is arranged to provide signals between the resonator and the second coil. A distance between the first pad and the first coil is less than a distance between the first coil and the first output terminal and a distance between the first coil and the second output terminal. A distance between the second pad and the second coil is less than a distance between the second coil and the first output terminal and a distance between the second coil and the second output terminal.

Abstract: An oscillation module includes an SAW filter, and a high-pass filter formed in an integrated circuit, the high-pass filter has a coil part, a capacitance part, and a first interconnection adapted to connect the coil part and the capacitance part to each other, and the capacitance part includes a capacitance array.

Abstract: An oscillation module includes an oscillation circuit which includes a first coil and a second coil and a filter circuit which is provided at a stage subsequent to the oscillation circuit and includes a third coil. The first coil, the second coil, and the third coil are a part of an integrated circuit. The third coil is arranged so as to intersect a virtual straight line equidistant from the center of the first coil and the center of the second coil, in a plan view of the integrated circuit.

Abstract: An oscillation module includes a loop interconnection, a high-frequency output interconnection, a differential amplifier, and an output terminal, the differential amplifier is connected to the output terminal with the high-frequency output interconnection, the high-frequency output interconnection crosses the loop interconnection in a grade-separated manner, and the loop interconnection is different in thickness between a crossing part and a non-crossing part with the high-frequency interconnection.

Abstract: A wedge-shaped contact region can be employed to provide electrical contacts to multiple electrically conductive layers in a three-dimensional device structure. A cavity including a generally wedge-shaped region and a primary region is formed in a dielectric matrix layer over a support structure. An alternating stack of insulating layers and electrically conductive layers is formed by a series of conformal deposition processes in the cavity and over the dielectric matrix layer. The alternating stack can be planarized employing the top surface of the dielectric matrix layer as a stopping layer. A tip portion of each electrically conductive layer within remaining portions of the alternating stack is laterally offset from the tip of the generally wedge-shaped region by a respective lateral offset distance along a lateral protrusion direction. Contact via structures can be formed on the tip portions of the electrically conductive layers to provide electrical contact.

Abstract: A three dimensional ReRAM device includes an etch stop dielectric material layer overlying top surfaces of the dielectric rail structures and the dielectric pillar structures. The etch stop dielectric material layer includes openings in areas that overlie semiconductor pillars of the vertical select transistors. An array of metal nitride portions is located within the openings in the etch stop dielectric material layer. The etch stop dielectric material layer protects the underlying dielectric pillar structures during anisotropic etching steps without covering the metal nitride portions.

Abstract: A three dimensional ReRAM device includes an etch stop dielectric material layer overlying top surfaces of the dielectric rail structures and the dielectric pillar structures. The etch stop dielectric material layer includes openings in areas that overlie semiconductor pillars of the vertical select transistors. An array of metal nitride portions is located within the openings in the etch stop dielectric material layer. The etch stop dielectric material layer protects the underlying dielectric pillar structures during anisotropic etching steps without covering the metal nitride portions.

Abstract: A wedge-shaped contact region can be employed to provide electrical contacts to multiple electrically conductive layers in a three-dimensional device structure. A cavity including a generally wedge-shaped region and a primary region is formed in a dielectric matrix layer over a support structure. An alternating stack of insulating layers and electrically conductive layers is formed by a series of conformal deposition processes in the cavity and over the dielectric matrix layer. The alternating stack can be planarized employing the top surface of the dielectric matrix layer as a stopping layer. A tip portion of each electrically conductive layer within remaining portions of the alternating stack is laterally offset from the tip of the generally wedge-shaped region by a respective lateral offset distance along a lateral protrusion direction. Contact via structures can be formed on the tip portions of the electrically conductive layers to provide electrical contact.

Abstract: An oscillation module includes an SAW filter, and a high-pass filter formed in an integrated circuit, the high-pass filter has a coil part, a capacitance part, and a first interconnection adapted to connect the coil part and the capacitance part to each other, and the capacitance part includes a capacitance array.

Abstract: An oscillation module includes a loop interconnection, a high-frequency output interconnection, a differential amplifier, and an output terminal, the differential amplifier is connected to the output terminal with the high-frequency output interconnection, the high-frequency output interconnection crosses the loop interconnection in a grade-separated manner, and the loop interconnection is different in thickness between a crossing part and a non-crossing part with the high-frequency interconnection.

Abstract: A method is provided that includes forming a transistor by forming a first a rail gate disposed in a first direction above a substrate, forming a second rail gate disposed in a second direction above the substrate, the second direction perpendicular to the first direction, and forming a bridge section disposed between the first rail gate and the second rail gate.

Abstract: A method is provided that includes forming a dielectric material above a substrate, forming a hole in the dielectric material, the hole disposed in a first direction, forming a word line layer above the substrate via the hole, the word line layer disposed in a second direction perpendicular to the first direction, forming a nonvolatile memory material on a sidewall of the hole, forming a local bit line in the hole, and forming a memory cell including the nonvolatile memory material at an intersection of the local bit line and the word line layer.

Abstract: An alternating stack of electrically conductive layers and electrically insulating layers is formed over global bit lines formed on a substrate. The alternating stack is patterned to form a line stack of electrically conductive lines and electrically insulating lines. Trench isolation structures are formed within each trench to define a plurality of memory openings laterally spaced from one another by the line stack in one direction and by trench isolation structures in another direction. The electrically conductive lines are laterally recessed relative to sidewall surfaces of the electrically insulating lines. A read/write memory material is deposited in recesses, and is anisotropically etched so that a top surface of a global bit line is physically exposed at a bottom of each memory opening. An electrically conductive bit line is formed within each memory opening to form a resistive random access memory device.

Abstract: An oscillation module includes: an oscillation circuit which includes a first coil and a second coil; and a filter circuit which is provided at a stage subsequent to the oscillation circuit and includes a third coil, in which the first coil, the second coil, and third coil are a part of an integrated circuit, and the third coil is arranged so as to intersect a virtual straight line equidistant from the center of the first coil and the center of the second coil, in a plan view of the integrated circuit.