Patents by Inventor Akira Obi
Akira Obi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8821742Abstract: A plasma etching method by using a plasma etching apparatus having a depressurizable processing chamber; a lower electrode for mounting thereon a substrate to be processed in the processing chamber; an upper electrode facing the lower electrode in the processing chamber with a plasma generation region formed therebetween; a radio frequency power supply unit for applying a radio frequency power between the upper electrode and the lower electrode to thereby form a radio frequency electric field in the plasma generation region, the method comprising: supplying a first gas including etchant gas to an upper gas inlet to introduce the first gas through the upper electrode into the plasma generation region; and feeding a second gas including dilution gas to a side gas inlet to introduce the second gas through a sidewall of the processing chamber into the plasma generation region.Type: GrantFiled: February 4, 2010Date of Patent: September 2, 2014Assignee: Tokyo Electron LimitedInventors: Ryoichi Yoshida, Tetsuo Yoshida, Michishige Saito, Toshikatsu Wakaki, Hayato Aoyama, Akira Obi, Hiroshi Suzuki
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Patent number: 8475623Abstract: A substrate processing method is used for a substrate processing system having a substrate processing device and a substrate transfer device. The substrate processing method includes a substrate transfer step of transferring a substrate and a substrate processing step of performing a predetermined process on the substrate. The substrate transfer step and the substrate processing step include a plurality of operations, and at least two operations among the plurality of the operations are performed simultaneously. Preferably, the substrate processing device includes an accommodating chamber, a mounting table placed in the accommodating chamber to be mounted thereon the substrate, and a heat transfer gas supply line for supplying a heat transfer gas to a space between the substrate mounted on the mounting table and the mounting table.Type: GrantFiled: August 2, 2012Date of Patent: July 2, 2013Assignee: Tokyo Electron LimitedInventors: Seiichi Kaise, Noriyuki Iwabuchi, Shigeaki Kato, Hiroshi Nakamura, Takeshi Yokouchi, Mariko Shibata, Akira Obi
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Publication number: 20120292290Abstract: A substrate processing method is used for a substrate processing system having a substrate processing device and a substrate transfer device. The substrate processing method includes a substrate transfer step of transferring a substrate and a substrate processing step of performing a predetermined process on the substrate. The substrate transfer step and the substrate processing step include a plurality of operations, and at least two operations among the plurality of the operations are performed simultaneously. Preferably, the substrate processing device includes an accommodating chamber, a mounting table placed in the accommodating chamber to be mounted thereon the substrate, and a heat transfer gas supply line for supplying a heat transfer gas to a space between the substrate mounted on the mounting table and the mounting table.Type: ApplicationFiled: August 2, 2012Publication date: November 22, 2012Applicant: TOKYO ELECTRON LIMITEDInventors: Seiichi Kaise, Noriyuki Iwabuchi, Shigeaki Kato, Hiroshi Nakamura, Takeshi Yokouchi, Mariko Shibata, Akira Obi
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Patent number: 8257601Abstract: A substrate processing method is used for a substrate processing system having a substrate processing device and a substrate transfer device. The substrate processing method includes a substrate transfer step of transferring a substrate and a substrate processing step of performing a predetermined process on the substrate. The substrate transfer step and the substrate processing step include a plurality of operations, and at least two operations among the plurality of the operations are performed simultaneously. Preferably, the substrate processing device includes an accommodating chamber, a mounting table placed in the accommodating chamber to be mounted thereon the substrate, and a heat transfer gas supply line for supplying a heat transfer gas to a space between the substrate mounted on the mounting table and the mounting table.Type: GrantFiled: March 28, 2011Date of Patent: September 4, 2012Assignee: Tokyo Electron LimitedInventors: Seiichi Kaise, Noriyuki Iwabuchi, Shigeaki Kato, Hiroshi Nakamura, Takeshi Yokouchi, Mariko Shibata, Akira Obi
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Publication number: 20110171830Abstract: A substrate processing method is used for a substrate processing system having a substrate processing device and a substrate transfer device. The substrate processing method includes a substrate transfer step of transferring a substrate and a substrate processing step of performing a predetermined process on the substrate. The substrate transfer step and the substrate processing step include a plurality of operations, and at least two operations among the plurality of the operations are performed simultaneously. Preferably, the substrate processing device includes an accommodating chamber, a mounting table placed in the accommodating chamber to be mounted thereon the substrate, and a heat transfer gas supply line for supplying a heat transfer gas to a space between the substrate mounted on the mounting table and the mounting table.Type: ApplicationFiled: March 28, 2011Publication date: July 14, 2011Applicant: TOKYO ELECTRON LIMITEDInventors: SEIICHI KAISE, NORIYUKI IWABUCHI, SHIGEAKI KATO, HIROSHI NAKAMURA, TAKESHI YOKOUCHI, MARIKO SHIBATA, AKIRA OBI
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Publication number: 20100133234Abstract: A plasma etching method by using a plasma etching apparatus having a depressurizable processing chamber; a lower electrode for mounting thereon a substrate to be processed in the processing chamber; an upper electrode facing the lower electrode in the processing chamber with a plasma generation region formed therebetween; a radio frequency power supply unit for applying a radio frequency power between the upper electrode and the lower electrode to thereby form a radio frequency electric field in the plasma generation region, the method comprising: supplying a first gas including etchant gas to an upper gas inlet to introduce the first gas through the upper electrode into the plasma generation region; and feeding a second gas including dilution gas to a side gas inlet to introduce the second gas through a sidewall of the processing chamber into the plasma generation region.Type: ApplicationFiled: February 4, 2010Publication date: June 3, 2010Applicant: TOKYO ELECTRON LIMITEDInventors: Ryoichi YOSHIDA, Tetsuo YOSHIDA, Michishige SAITO, Toshikatsu WAKAKI, Hayato AOYAMA, Akira OBI, Hiroshi SUZUKI
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Patent number: 7555406Abstract: According to the present invention, as processing apparatus drive starts, the operating state of software used to drive the processing apparatus is monitored in real time to diagnose whether or not an abnormality has occurred (S110). If it is judged through the diagnosis performed in S110 that no abnormality has occurred, the workpiece processing is allowed to continue uninterrupted and then a decision is made as to whether or not the workpiece processing has been completed (S130). If the processing has been completed, the processing apparatus is stopped (S140). If, on the other hand, it is judged through the diagnosis performed in S110 that an abnormality has occurred, a log of the diagnosis item with regard to which the abnormality has occurred is recorded (S120). The processing apparatus is then stopped (S140).Type: GrantFiled: November 12, 2004Date of Patent: June 30, 2009Assignee: Tokyo Electron LimitedInventors: Hisato Tanaka, Akira Obi, Akira Iwami, Kazushi Tahara, Shigeaki Kato
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Patent number: 7386423Abstract: According to the present invention, as processing apparatus drive starts, the operating state of software used to drive the processing apparatus is monitored in real time to diagnose whether or not an abnormality has occurred (S110). If it is judged through the diagnosis performed in S110 that no abnormality has occurred, the workpiece processing is allowed to continue uninterrupted and then a decision is made as to whether or not the workpiece processing has been completed (S130). If the processing has been completed, the processing apparatus is stopped (S140). If, on the other hand, it is judged through the diagnosis performed in S110 that an abnormality has occurred, a log of the diagnosis item with regard to which the abnormality has occurred is recorded (S120). The processing apparatus is then stopped (S140).Type: GrantFiled: November 12, 2004Date of Patent: June 10, 2008Inventors: Hisato Tanaka, Akira Obi, Akira Iwami, Kazushi Tahara, Shigeaki Kato
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Patent number: 7245987Abstract: At a time Tp when a wafer W is transferred into either a load lock chamber LL1 or LL2, periods PSL for the load lock chambers LL1 and LL2 to get ready to permit a transfer of a next wafer W thereinto are calculated based on a timing for exchange of wafers W between the load lock chamber LL1 or LL2 and a loader module LM. When the periods PSL are calculated, a loader arm LA1 or LA2 selects a next wafer W having the shortest period to get ready to be transferable into the load lock chamber LL1 or LL2, from load ports LP1 to LP3. This improves transfer delay in a cluster tool provided with the load lock chambers.Type: GrantFiled: May 16, 2005Date of Patent: July 17, 2007Assignee: Tokyo Electron LimitedInventors: Kiyohito Iijima, Seiichi Kaise, Keiko Takahashi, Akira Obi
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Patent number: 7191082Abstract: A method of inspecting a substrate processing apparatus that enables a reduction in operator labor time to be achieved. A host computer instructs a substrate processing apparatus to prohibit transfer of a product wafer into the substrate processing apparatus during a period of cleaning the substrate processing apparatus. The substrate processing apparatus notifies the host computer of a number and types of inspection wafers to be used in inspections for predetermined inspection items. The host computer notifies the substrate processing apparatus that preparation of the inspection wafers has been completed.Type: GrantFiled: January 11, 2006Date of Patent: March 13, 2007Assignee: Tokyo Electron LimitedInventors: Akira Obi, Hiroshi Nakamura
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Publication number: 20060160256Abstract: A method of inspecting a substrate processing apparatus that enables a reduction in operator labor time to be achieved. A host computer instructs a substrate processing apparatus to prohibit transfer of a product wafer into the substrate processing apparatus during a period of cleaning the substrate processing apparatus. The substrate processing apparatus notifies the host computer of a number and types of inspection wafers to be used in inspections for predetermined inspection items. The host computer notifies the substrate processing apparatus that preparation of the inspection wafers has been completed.Type: ApplicationFiled: January 11, 2006Publication date: July 20, 2006Applicant: TOKYO ELECTRON LIMITEDInventors: Akira Obi, Hiroshi Nakamura
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Publication number: 20060090703Abstract: A substrate processing method is used for a substrate processing system having a substrate processing device and a substrate transfer device. The substrate processing method includes a substrate transfer step of transferring a substrate and a substrate processing step of performing a predetermined process on the substrate. The substrate transfer step and the substrate processing step include a plurality of operations, and at least two operations among the plurality of the operations are performed simultaneously. Preferably, the substrate processing device includes an accommodating chamber, a mounting table placed in the accommodating chamber to be mounted thereon the substrate, and a heat transfer gas supply line for supplying a heat transfer gas to a space between the substrate mounted on the mounting table and the mounting table.Type: ApplicationFiled: November 1, 2005Publication date: May 4, 2006Applicant: TOKYO ELECTRON LIMITEDInventors: Seiichi Kaise, Noriyuki Iwabuchi, Shigeaki Kato, Hiroshi Nakamura, Takeshi Yokouchi, Mariko Shibata, Akira Obi
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Publication number: 20060042754Abstract: In order to improve a controllability of etching characteristics by way of precisely and freely controlling a flow or a density distribution of a processing gas introduced into a processing chamber, a plasma etching apparatus includes, as a gas inlet for introducing an etching gas into a plasma generation region PS in a chamber 10, an upper gas inlet (an upper central shower head 66a and an upper peripheral shower head 68a) for introducing a gas through an upper electrode 38; and a side gas inlet for introducing a gas through a sidewall of the chamber 10. The side gas inlet 104 has a side shower head 108 attached to the sidewall of the chamber 10.Type: ApplicationFiled: July 29, 2005Publication date: March 2, 2006Applicant: TOKYO ELECTRON LIMITEDInventors: Ryoichi Yoshida, Tetsuo Yoshida, Michishige Saito, Toshikatsu Wakaki, Hayato Aoyama, Akira Obi, Hiroshi Suzuki
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Patent number: 6970770Abstract: At a time Tp when a wafer W is transferred into either a load lock chamber LL1 or LL2, periods PSL for the load lock chambers LL1 and LL2 to get ready to permit a transfer of a next wafer W thereinto are calculated based on a timing for exchange of wafers W between the load lock chamber LL1 or LL2 and a loader module LM. When the periods PSL are calculated, a loader arm LA1 or LA2 selects a next wafer W having the shortest period to get ready to be transferable into the load lock chamber LL1 or LL2, from load ports LP1 to LP3. This improves transfer delay in a cluster tool provided with the load lock chambers.Type: GrantFiled: April 2, 2002Date of Patent: November 29, 2005Assignee: Tokyo Electron LimitedInventors: Kiyohito Iljima, Seiichi Kaise, Keiko Takahashi, Akira Obi
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Patent number: 6954716Abstract: According to the present invention, as processing apparatus drive starts, the operating state of software used to drive the processing apparatus is monitored in real time to diagnose whether or not an abnormality has occurred (S110). If it is judged through the diagnosis performed in S110 that no abnormality has occurred, the workpiece processing is allowed to continue uninterrupted and then a decision is made as to whether or not the workpiece processing has been completed (S130). If the processing has been completed, the processing apparatus is stopped (S140). If, on the other hand, it is judged through the diagnosis performed in S110 that an abnormality has occurred, a log of the diagnosis item with regard to which the abnormality has occurred is recorded (S120). The processing apparatus is then stopped (S140).Type: GrantFiled: July 4, 2001Date of Patent: October 11, 2005Assignee: Tokyo Electron LimitedInventors: Hisato Tanaka, Akira Obi, Akira Iwami, Kazushi Tahara, Shigeaki Kato
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Publication number: 20050220577Abstract: At a time Tp when a wafer W is transferred into either a load lock chamber LL1 or LL2, periods PSL for the load lock chambers LL1 and LL2 to get ready to permit a transfer of a next wafer W thereinto are calculated based on a timing for exchange of wafers W between the load lock chamber LL1 or LL2 and a loader module LM. When the periods PSL are calculated, a loader arm LA1 or LA2 selects a next wafer W having the shortest period to get ready to be transferable into the load lock chamber LL1 or LL2, from load ports LP1 to LP3. This improves transfer delay in a cluster tool provided with the load lock chambers.Type: ApplicationFiled: May 16, 2005Publication date: October 6, 2005Applicant: TOKYO ELECTRON LIMITEDInventors: Kiyohito Iijima, Seiichi Kaise, Keiko Takahashi, Akira Obi
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Publication number: 20050090927Abstract: According to the present invention, as processing apparatus drive starts, the operating state of software used to drive the processing apparatus is monitored in real time to diagnose whether or not an abnormality has occurred (S110). If it is judged through the diagnosis performed in S110 that no abnormality has occurred, the workpiece processing is allowed to continue uninterrupted and then a decision is made as to whether or not the workpiece processing has been completed (S130). If the processing has been completed, the processing apparatus is stopped (S140). If, on the other hand, it is judged through the diagnosis performed in S110 that an abnormality has occurred, a log of the diagnosis item with regard to which the abnormality has occurred is recorded (S120). The processing apparatus is then stopped (S140).Type: ApplicationFiled: November 12, 2004Publication date: April 28, 2005Applicant: TOKYO ELECTRON LIMITEDInventors: Hisato Tanaka, Akira Obi, Akira Iwami, Kazushi Tahara, Shigeaki Kato
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Publication number: 20050090926Abstract: According to the present invention, as processing apparatus drive starts, the operating state of software used to drive the processing apparatus is monitored in real time to diagnose whether or not an abnormality has occurred (S110). If it is judged through the diagnosis performed in S110 that no abnormality has occurred, the workpiece processing is allowed to continue uninterrupted and then a decision is made as to whether or not the workpiece processing has been completed (S130). If the processing has been completed, the processing apparatus is stopped (S140). If, on the other hand, it is judged through the diagnosis performed in S110 that an abnormality has occurred, a log of the diagnosis item with regard to which the abnormality has occurred is recorded (S120). The processing apparatus is then stopped (S140).Type: ApplicationFiled: November 12, 2004Publication date: April 28, 2005Applicant: TOKYO ELECTRON LIMITEDInventors: Hisato Tanaka, Akira Obi, Akira Iwami, Kazushi Tahara, Shigeaki Kato
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Publication number: 20050064609Abstract: A semiconductor processing system includes a processing chamber, a gas exhaust unit, a gas supply unit, a flow rate controller, a flow rate measuring unit for inspecting the flow rate controller, and a control unit for controlling the processing system. The flow rate measuring unit contains an inspection vessel, a pressure gauge, and a flow rate calculation unit, and the control unit is configured to purge the inspection vessel before or after flowing the processing gas into thereto. Further, an inspecting method of the flow rate controller in the semiconductor processing system includes the steps of flowing the processing gas to the inspection vessel, detecting an inner pressure of the inspection vessel, obtaining a gas flow rate of the flow rate controller, and performing a purge process on the inspection vessel.Type: ApplicationFiled: October 21, 2004Publication date: March 24, 2005Applicant: TOKYO ELECTRON LIMITEDInventors: Hideki Nagaoka, Aya Morokata, Norikazu Sasaki, Kazushige Shimura, Kenetsu Mizusawa, Akira Obi, Masaaki Abe
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Publication number: 20040117059Abstract: At a time Tp when a wafer W is transferred into either a load lock chamber LL1 or LL2, periods PSL for the load lock chambers LL1 and LL2 to get ready to permit a transfer of a next wafer W thereinto are calculated based on a timing for exchange of wafers W between the load lock chamber LL1 or LL2 and a loader module LM. When the periods PSL are calculated, a loader arm LA1 or LA2 selects a next wafer W having the shortest period to get ready to be transferable into the load lock chamber LL1 or LL2, from load ports LP1 to LP3. This improves transfer delay in a cluster tool provided with the load lock chambers.Type: ApplicationFiled: October 6, 2003Publication date: June 17, 2004Inventors: Kiyohito IIjima, Seiichi Kaise, Keiko Takahashi, Akira Obi