Patents by Inventor Akira Ohmichi

Akira Ohmichi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6885225
    Abstract: A drive circuit includes a totem-pole output stage including a top arm and a bottom arm, a pre-drive circuit including a top arm driver and a bottom arm driver, and a power supply voltage boosting power supply circuit. The boosting power supply circuit includes a top arm driver boosting power supply circuit that boosts the top arm and a bottom arm driver boosting power supply circuit that boosts the power supply voltage and outputs a boosted voltage.
    Type: Grant
    Filed: October 10, 2002
    Date of Patent: April 26, 2005
    Assignee: Renesas Technology Corp.
    Inventors: Akira Ohmichi, Keiichiro Numakura
  • Patent number: 6813169
    Abstract: A first transistor is turned on when an H-level signal is input. A power supply voltage is applied to a gate electrode of a first switching element to charge a miller capacitance of the first switching element. As a result, gate voltage of the first switching element rises gradually and the first switching element is turned on. In this manner, the first switching element is controlled so that switching speed of the first switching element decreases. During this time, a through current caused by a backward recovery current of a fly-wheel diode connected to the first switching element is reduced. When the gate voltage of the first switching element exceeds a logic inversion voltage, the first switching element is controlled so that the switching speed is increased.
    Type: Grant
    Filed: June 26, 2003
    Date of Patent: November 2, 2004
    Assignee: Renesas Technology Corp.
    Inventors: Hiroyuki Inoue, Akira Ohmichi
  • Publication number: 20040145918
    Abstract: A first transistor is turned on when an H-level signal is input. Voltage of a power supply Vm is applied to a gate electrode of a first switching element to thereby charge a miller capacitance of the first switching element. As a result, gate voltage of the first switching element rises gradually and the first switching element is turned on. In this manner, the first switching element is controlled that a switching speed of the first switching element decreases. During this time, level of a through-type current caused by a backward recovery current of a fly-wheel diode connected to the first switching element is lowered. If the gate voltage of the first switching element exceeds the logic inversion voltage, then the first switching element is controlled so that the switching speed is increased.
    Type: Application
    Filed: June 26, 2003
    Publication date: July 29, 2004
    Applicant: Renesas Technology Corp.
    Inventors: Hiroyuki Inoue, Akira Ohmichi
  • Publication number: 20030156439
    Abstract: A drive circuit includes a totem-pole type output stage including a top arm and a bottom arm, a pre-drive circuit including a top arm driver and a bottom arm driver, and a power supply voltage (VCC) boosting power supply circuit. The VCC boosting power supply circuit includes a top arm driver boosting power supply circuit that boosts the top arm and a bottom arm driver boosting power supply circuit that boosts a voltage of a VCC power supply and outputs a boosted voltage.
    Type: Application
    Filed: October 10, 2002
    Publication date: August 21, 2003
    Applicant: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Akira Ohmichi, Keiichiro Numakura
  • Patent number: 6014054
    Abstract: A differential amplifier circuit has a differential amplifier circuit section for amplifying a difference voltage between an inverting input node and a non-inverting input node, and an output buffer circuit for outputting, to an output node, the amplified difference. The differential amplifier circuit section is connected to a first high potential power supply node and a first low potential power supply node, and is driven by potentials applied to the first high potential and first low potential power supply nodes. The output buffer circuit is connected to a second high potential power supply node and a second low potential power supply node, and is driven by potentials applied to the second high potential and low potential power supply nodes.
    Type: Grant
    Filed: February 4, 1998
    Date of Patent: January 11, 2000
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Keisuke Kawakita, Akira Ohmichi
  • Patent number: 5841321
    Abstract: An amplifying circuit includes a first amplifier having a first input terminal, a second input terminal, and an output terminal for pushing an output current; a second amplifier having a first input terminal, a second input terminal, and an output terminal for pulling an output current; a circuit for detecting the output current of an operational amplifier in the second amplifier; and an offset voltage generating circuit for generating an offset voltage.
    Type: Grant
    Filed: April 17, 1997
    Date of Patent: November 24, 1998
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Hideki Miyake, Akira Ohmichi