Patents by Inventor Akira Oseto

Akira Oseto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230411414
    Abstract: A semiconductor apparatus includes a semiconductor layer, a wiring layer or a plurality of wiring layers, and a first heat dissipation layer. The semiconductor layer has a first surface and a second surface and includes, between the first surface and the second surface, a semiconductor element and a protection circuit. The wiring layer(s) is disposed at a first-surface side and electrically connected to the protection circuit. The first-surface side is a side where the first surface is located. The first heat dissipation layer is disposed between the wiring layer and the semiconductor layer or between a wiring layer closest to the semiconductor layer, among the wiring layers, and the semiconductor layer, and not electrically connected to the protection circuit. In a plan view taken at the first-surface side, the first heat dissipation layer is disposed at a position of overlapping with at least a part of the protection circuit.
    Type: Application
    Filed: June 14, 2023
    Publication date: December 21, 2023
    Inventors: TATSUNORI KATO, AKIRA OSETO, SAKAE HASHIMOTO
  • Patent number: 11532660
    Abstract: A photoelectric conversion device including a plurality of substrates in a stacked state, the plurality of substrates including a first substrate and a second substrate electrically connected to each other, the photoelectric conversion device comprising: a memory cell unit including row-selection lines that are to be driven upon selection of a row of a memory cell array and column-selection lines that are to be driven upon selection of a column of the memory cell array; and a memory peripheral circuit unit that includes row-selection line connection portions and column-selection line connection portions so as to drive the row-selection lines and to drive the column-selection lines, wherein a first portion that is at least a part of the memory peripheral circuit unit is formed on the first substrate and the memory cell unit is formed on the second substrate.
    Type: Grant
    Filed: November 19, 2019
    Date of Patent: December 20, 2022
    Assignee: Canon Kabushiki Kaisha
    Inventors: Tatsunori Kato, Akira Oseto, Ryunosuke Ishii, Takanori Watanabe
  • Patent number: 11425365
    Abstract: A photoelectric conversion device comprising: a first substrate that includes a pixel circuit including a photoelectric conversion element; a second substrate having a signal processing circuit that drives the pixel circuit or processes a signal from the pixel circuit; a connection part electrically connecting the first substrate and the second substrate; and an inspection circuit, wherein the inspection circuit is formed in one of the first and second substrates and is connected to a wire supplying a first potential and being provided in the one of the first and second substrates, and the inspection circuit is connected via the connection part to a wire supplying a second potential and being provided in the other of the first and second substrates.
    Type: Grant
    Filed: December 4, 2019
    Date of Patent: August 23, 2022
    Assignee: Canon Kabushiki Kaisha
    Inventors: Ryunosuke Ishii, Akira Oseto, Tatsunori Kato, Takanori Watanabe, Nobuaki Kakinuma, Hiroaki Kobayashi, Katsuhito Sakurai
  • Publication number: 20210358904
    Abstract: A photoelectric conversion apparatus includes a pad, a first protection circuit provided on a first semiconductor substrate, and a second protection circuit provided on a second semiconductor substrate. The first semiconductor substrate, which includes a plurality of photoelectric conversion units each receiving incident light and generating signal charge, and the second semiconductor substrate, which includes at least one signal processing circuit that processes an input signal based on the generated signal charge, are laminated. The pad receives a power supply voltage as input from an outside of the photoelectric conversion apparatus. At least one of the first protection circuit or the second protection circuit is provided on an outside of a region in which the pad is provided, in planar view. At least one of the first protection circuit or the second protection circuit is connected to the pad.
    Type: Application
    Filed: May 11, 2021
    Publication date: November 18, 2021
    Inventors: Akira Oseto, Nobuaki Kakinuma, Tatsunori Kato, Ryunosuke Ishii, Koji Hara
  • Patent number: 11094733
    Abstract: A semiconductor device has a first transistor of a first conductivity type and a second transistor of a second conductivity type, the first transistor is arranged in an active region of a semiconductor substrate, and a gate electrode and the active region overlap with each other in a plan view and also have a portion located between the source and the drain of the first transistor of the semiconductor substrate. In the channel width direction, an impurity concentration of the second conductivity type is higher at the end than on the center side of the portion.
    Type: Grant
    Filed: October 14, 2019
    Date of Patent: August 17, 2021
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Akira Oseto, Tatsunori Kato, Ryunosuke Ishii, Takanori Watanabe, Atsushi Suzuki, Koichiro Iwata, Kazuo Yamazaki, Hideaki Takada, Akira Ohtani
  • Publication number: 20200195916
    Abstract: A photoelectric conversion device comprising: a first substrate that includes a pixel circuit including a photoelectric conversion element; a second substrate having a signal processing circuit that drives the pixel circuit or processes a signal from the pixel circuit; a connection part electrically connecting the first substrate and the second substrate; and an inspection circuit, wherein the inspection circuit is formed in one of the first and second substrates and is connected to a wire supplying a first potential and being provided in the one of the first and second substrates, and the inspection circuit is connected via the connection part to a wire supplying a second potential and being provided in the other of the first and second substrates.
    Type: Application
    Filed: December 4, 2019
    Publication date: June 18, 2020
    Inventors: Ryunosuke Ishii, Akira Oseto, Tatsunori Kato, Takanori Watanabe, Nobuaki Kakinuma, Hiroaki Kobayashi, Katsuhito Sakurai
  • Publication number: 20200168652
    Abstract: A photoelectric conversion device including a plurality of substrates in a stacked state, the plurality of substrates including a first substrate and a second substrate electrically connected to each other, the photoelectric conversion device comprising: a memory cell unit including row-selection lines that are to be driven upon selection of a row of a memory cell array and column-selection lines that are to be driven upon selection of a column of the memory cell array; and a memory peripheral circuit unit that includes row-selection line connection portions and column-selection line connection portions so as to drive the row-selection lines and to drive the column-selection lines, wherein a first portion that is at least a part of the memory peripheral circuit unit is formed on the first substrate and the memory cell unit is formed on the second substrate.
    Type: Application
    Filed: November 19, 2019
    Publication date: May 28, 2020
    Inventors: Tatsunori Kato, Akira Oseto, Ryunosuke Ishii, Takanori Watanabe
  • Publication number: 20200127035
    Abstract: A semiconductor device has a first transistor of a first conductivity type and a second transistor of a second conductivity type, the first transistor is arranged in an active region of a semiconductor substrate, and a gate electrode and the active region overlap with each other in a plan view and also have a portion located between the source and the drain of the first transistor of the semiconductor substrate. In the channel width direction, an impurity concentration of the second conductivity type is higher at the end than on the center side of the portion.
    Type: Application
    Filed: October 14, 2019
    Publication date: April 23, 2020
    Inventors: Akira Oseto, Tatsunori Kato, Ryunosuke Ishii, Takanori Watanabe, Atsushi Suzuki, Koichiro Iwata, Kazuo Yamazaki, Hideaki Takada, Akira Ohtani