Patents by Inventor Akira Sampei
Akira Sampei has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20200073751Abstract: A storage apparatus includes a memory; a relay device configured to relay access to the memory; and a processor coupled to the relay device and configured to when anomaly is detected by monitoring for the relay device, perform diagnostic testing with respect to the access to the memory via the relay device, and when it is detected that the access is failed, change a threshold time in accordance with whether a redundant path connecting to the memory exists, the threshold time indicating a period from a time when it is detected that the access is failed to a time when disconnection of the relay device from communication with the processor is performed.Type: ApplicationFiled: August 27, 2019Publication date: March 5, 2020Applicant: FUJITSU LIMITEDInventor: Akira Sampei
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Patent number: 10409663Abstract: A first control apparatus transmits, to a second control apparatus, a first error score based on an error detection situation at the time of accessing a first memory device through the second control apparatus, and transmits, to a third control apparatus, a second error score based on an error detection situation at the time of accessing a second memory device through the third control apparatus. The second control apparatus determines whether the first memory device malfunctions, based on a sum of a third error score based on the error detection situation at the time of accessing the first memory device and the received first error score. The third control apparatus determines whether the second memory device malfunctions, based on a sum of a fourth error score based on the error detection situation at the time of accessing the second memory device and the received second error score.Type: GrantFiled: March 25, 2016Date of Patent: September 10, 2019Assignee: FUJITSU LIMITEDInventors: Akira Sampei, Fumio Hanzawa, Hiroaki Sato
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Patent number: 10089022Abstract: A memory stores a statistical processing program for controlling a storage apparatus, first definition information to be updated together with the statistical processing program, and second definition information. When updating definition information together with updating the statistical processing program, a processor updates the first definition information. When updating definition information without updating the statistical processing program, the processor updates the second definition information. The processor performs statistical processing for controlling the storage apparatus by using the updated first definition information or the updated second definition information.Type: GrantFiled: March 3, 2015Date of Patent: October 2, 2018Assignee: FUJITSU LIMITEDInventors: Yosuke Usuda, Akira Sampei
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Patent number: 9966759Abstract: A battery monitor circuit includes a first monitoring unit for detecting voltages of battery cells in a first group, a second monitoring unit for detecting voltages of battery cells in a second group, and a current cancellation unit for canceling a difference between first and second currents that flow through the first and second monitoring units, respectively. One terminal of a series connection of the battery cells in the first and second groups and one terminal of the first monitoring unit are connected, the other terminal of the first monitoring unit and one terminal of the second monitoring unit are connected, and the other terminal of the second monitoring unit and the other terminal of the series connection are connected. The current cancellation unit is disposed between a connection point between the first and second monitoring units and a middle connection point in the middle of the series connection.Type: GrantFiled: November 2, 2015Date of Patent: May 8, 2018Assignee: Murata Manufacturing Co., Ltd.Inventors: Eiji Kumagai, Akira Sampei, Kazuharu Yanagihara
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Patent number: 9760423Abstract: A first control device includes a first storage unit holding a first error count and a first control unit that calculates the first error count, based on a status of an error detected when a storage device is accessed via a second control device, stores the calculated first error count in the first storage unit, and transmits the first error count to the second control device at predetermined timing. The second control device includes a second storage unit holding a second error count and a second control unit that calculates the second error count, based on a status of an error detected when the storage device is accessed, stores the calculated second error count in the second storage unit, and determines whether the storage device has malfunctioned, based on an aggregate value of the first error count received from the first control device and the second error count.Type: GrantFiled: March 24, 2016Date of Patent: September 12, 2017Assignee: FUJITSU LIMITEDInventors: Akira Sampei, Fumio Hanzawa, Hiroaki Sato
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Publication number: 20160321123Abstract: A first control apparatus transmits, to a second control apparatus, a first error score based on an error detection situation at the time of accessing a first memory device through the second control apparatus, and transmits, to a third control apparatus, a second error score based on an error detection situation at the time of accessing a second memory device through the third control apparatus. The second control apparatus determines whether the first memory device malfunctions, based on a sum of a third error score based on the error detection situation at the time of accessing the first memory device and the received first error score. The third control apparatus determines whether the second memory device malfunctions, based on a sum of a fourth error score based on the error detection situation at the time of accessing the second memory device and the received second error score.Type: ApplicationFiled: March 25, 2016Publication date: November 3, 2016Applicant: FUJITSU LIMITEDInventors: Akira SAMPEI, Fumio HANZAWA, Hiroaki SATO
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Publication number: 20160321122Abstract: A first control device includes a first storage unit holding a first error count and a first control unit that calculates the first error count, based on a status of an error detected when a storage device is accessed via a second control device, stores the calculated first error count in the first storage unit, and transmits the first error count to the second control device at predetermined timing. The second control device includes a second storage unit holding a second error count and a second control unit that calculates the second error count, based on a status of an error detected when the storage device is accessed, stores the calculated second error count in the second storage unit, and determines whether the storage device has malfunctioned, based on an aggregate value of the first error count received from the first control device and the second error count.Type: ApplicationFiled: March 24, 2016Publication date: November 3, 2016Applicant: FUJITSU LIMITEDInventors: Akira SAMPEI, Fumio HANZAWA, Hiroaki SATO
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Patent number: 9459943Abstract: An information processing device includes a plurality of components and a processor. The processor is configured to measure, upon detection of abnormalities in first components among the plurality of components, a number of abnormalities that occur in each of the first components. The processor is configured to measure an access processing value in each of the first components. The access processing value represents an amount of a predetermined feature relating to each of the first components. The processor is configured to calculate a ratio of the number of abnormalities to the access processing value in each of the first components. The processor is configured to identify a component as a fault location based on the calculated ratios.Type: GrantFiled: April 18, 2014Date of Patent: October 4, 2016Assignee: FUJITSU LIMITEDInventors: Akira Sampei, Fumio Hanzawa, Hiroaki Sato, Tsunemichi Harada
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Publication number: 20160072282Abstract: A battery monitor circuit includes a first monitoring unit for detecting voltages of battery cells in a first group, a second monitoring unit for detecting voltages of battery cells in a second group, and a current cancellation unit for canceling a difference between first and second currents that flow through the first and second monitoring units, respectively. One terminal of a series connection of the battery cells in the first and second groups and one terminal of the first monitoring unit are connected, the other terminal of the first monitoring unit and one terminal of the second monitoring unit are connected, and the other terminal of the second monitoring unit and the other terminal of the series connection are connected. The current cancellation unit is disposed between a connection point between the first and second monitoring units and a middle connection point in the middle of the series connection.Type: ApplicationFiled: November 2, 2015Publication date: March 10, 2016Inventors: Eiji Kumagai, Akira Sampei, Kazuharu Yanagihara
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Patent number: 9178366Abstract: A battery monitor circuit includes a first monitoring unit for detecting voltages of battery cells in a first group, a second monitoring unit for detecting voltages of battery cells in a second group, and a current cancellation unit for canceling a difference between first and second currents that flow through the first and second monitoring units, respectively. One terminal of a series connection of the battery cells in the first and second groups and one terminal of the first monitoring unit are connected, the other terminal of the first monitoring unit and one terminal of the second monitoring unit are connected, and the other terminal of the second monitoring unit and the other terminal of the series connection are connected. The current cancellation unit is disposed between a connection point between the first and second monitoring units and a middle connection point in the middle of the series connection.Type: GrantFiled: June 21, 2012Date of Patent: November 3, 2015Assignee: Sony CorporationInventors: Eiji Kumagai, Akira Sampei, Kazuharu Yanagihara
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Patent number: 9164824Abstract: An information processing apparatus includes a plurality of controller modules capable of performing communications with each other, and a memory included in each controller module to be stored with status information reflecting a status of an error occurring during the communications with other controller modules with respect to the controller module of a communication partner apparatus and/or the controller module of the self-apparatus, wherein, when determining whether or not a fault occurs in a certain controller module in the plurality of controller modules, the controller module different from a determination target controller module determines, based on status information of the determination target controller module that is stored on the memories of two or more controller modules different from the determination target controller module, whether the fault occurs in the determination target controller module.Type: GrantFiled: October 24, 2012Date of Patent: October 20, 2015Assignee: FUJITSU LIMITEDInventors: Tsunemichi Harada, Hiroaki Sato, Akira Sampei, Fumio Hanzawa
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Publication number: 20150268882Abstract: A memory stores a statistical processing program for controlling a storage apparatus, first definition information to be updated together with the statistical processing program, and second definition information. When updating definition information together with updating the statistical processing program, a processor updates the first definition information. When updating definition information without updating the statistical processing program, the processor updates the second definition information. The processor performs statistical processing for controlling the storage apparatus by using the updated first definition information or the updated second definition information.Type: ApplicationFiled: March 3, 2015Publication date: September 24, 2015Inventors: Yosuke Usuda, Akira Sampei
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Publication number: 20140344630Abstract: An information processing device includes a plurality of components and a processor. The processor is configured to measure, upon detection of abnormalities in first components among the plurality of components, a number of abnormalities that occur in each of the first components. The processor is configured to measure an access processing value in each of the first components. The access processing value represents an amount of a predetermined feature relating to each of the first components. The processor is configured to calculate a ratio of the number of abnormalities to the access processing value in each of the first components. The processor is configured to identify a component as a fault location based on the calculated ratios.Type: ApplicationFiled: April 18, 2014Publication date: November 20, 2014Applicant: FUJITSU LIMITEDInventors: Akira SAMPEI, Fumio Hanzawa, Hiroaki Sato, Tsunemichi Harada
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Patent number: 8874972Abstract: In a storage system, when a recovered error occurred upon access to a storage apparatus, a data redundancy determination unit determines whether data to be accessed has redundancy. When the data is determined to have no redundancy, an anomaly-occurring portion determination unit determines that the storage apparatus is not an anomaly-occurring portion and at the same time, an error history determination unit determines whether a recovered error occurred at the time of the past access to the storage apparatus other than that of the access destination. The anomaly-occurring portion determination unit determines whether a common transmission path is the anomaly-occurring portion based on the determination result of the error history determination unit.Type: GrantFiled: February 13, 2012Date of Patent: October 28, 2014Assignee: Fujitsu LimitedInventors: Akira Sampei, Fumio Hanzawa, Hiroaki Sato
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Patent number: 8634156Abstract: In a storage system, when power supply to HDDs is instantaneously interrupted, a spin up controller of a magnetic disk apparatus spins up the HDDs. On the other hand, based on a response for an access to the HDDs in the magnetic disk apparatus, when detecting that the HDDs as an access destination are spun down, a spin up controller of a control apparatus spins up the HDDs. When a certain number of the HDDs or more are spun down, a separate controller does not permit the magnetic disk apparatus to be used for a given length of time. While the magnetic disk apparatus is not permitted to be used, the HDDs are spun up by using the spin up controller of the magnetic disk apparatus.Type: GrantFiled: February 7, 2012Date of Patent: January 21, 2014Assignee: Fujitsu LimitedInventors: Akira Sampei, Tsunemichi Harada, Hiroaki Sato, Fumio Hanzawa
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Publication number: 20130002030Abstract: A battery monitor circuit includes a first monitoring unit for detecting voltages of battery cells in a first group, a second monitoring unit for detecting voltages of battery cells in a second group, and a current cancellation unit for canceling a difference between first and second currents that flow through the first and second monitoring units, respectively. One terminal of a series connection of the battery cells in the first and second groups and one terminal of the first monitoring unit are connected, the other terminal of the first monitoring unit and one terminal of the second monitoring unit are connected, and the other terminal of the second monitoring unit and the other terminal of the series connection are connected. The current cancellation unit is disposed between a connection point between the first and second monitoring units and a middle connection point in the middle of the series connection.Type: ApplicationFiled: June 21, 2012Publication date: January 3, 2013Applicant: SONY CORPORATIONInventors: Eiji Kumagai, Akira Sampei, Kazuharu Yanagihara
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Patent number: 8307244Abstract: A storage system includes first and second expanders for connecting storage units, each of the first and second expanders being connected cascade each other, a first controller connected one of the first and one of the second expanders and a host, a second controller connected the one of the second expanders, the one of the first expanders and the host, the second controller detecting a failure of at least one of the first controller, the first expanders and the second expanders, the second controller selectively controlling a first boot sequence which boots the first controller after the first expanders have been booted and a second boot sequence which boots the first controller before the first expanders have been booted, determining one of the first boot sequence and the second boot sequence on the basis of a place where a failure has occurred in a recovery process.Type: GrantFiled: May 25, 2010Date of Patent: November 6, 2012Assignee: Fujitsu LimitedInventors: Kouichi Tsukada, Akira Sampei, Fumio Hanzawa, Hiroaki Sato, Kazuo Nakashima
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Publication number: 20120254673Abstract: In a storage system, when a recovered error occurred upon access to a storage apparatus, a data redundancy determination unit determines whether data to be accessed has redundancy. When the data is determined to have no redundancy, an anomaly-occurring portion determination unit determines that the storage apparatus is not an anomaly-occurring portion and at the same time, an error history determination unit determines whether a recovered error occurred at the time of the past access to the storage apparatus other than that of the access destination. The anomaly-occurring portion determination unit determines whether a common transmission path is the anomaly-occurring portion based on the determination result of the error history determination unit.Type: ApplicationFiled: February 13, 2012Publication date: October 4, 2012Applicant: FUJITSU LIMITEDInventors: Akira SAMPEI, Fumio HANZAWA, Hiroaki SATO
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Publication number: 20120250179Abstract: In a storage system, when power supply to HDDs is instantaneously interrupted, a spin up controller of a magnetic disk apparatus spins up the HDDs. On the other hand, based on a response for an access to the HDDs in the magnetic disk apparatus, when detecting that the HDDs as an access destination are spun down, a spin up controller of a control apparatus spins up the HDDs. When a certain number of the HDDs or more are spun down, a separate controller does not permit the magnetic disk apparatus to be used for a given length of time. While the magnetic disk apparatus is not permitted to be used, the HDDs are spun up by using the spin up controller of the magnetic disk apparatus.Type: ApplicationFiled: February 7, 2012Publication date: October 4, 2012Applicant: FUJITSU LIMITEDInventors: Akira SAMPEI, Tsunemichi Harada, Hiroaki Sato, Fumio Hanzawa
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Publication number: 20120005426Abstract: A storage device includes a plurality of data storage units that store data; an attribution storage unit that stores an attribution group including each data storage unit on the basis of attributions of the plurality of data storage units; a defect storage unit that stores defects that occurred in a data storage unit; and a preventive-maintenance-subject extracting unit that extracts, as a preventive-maintenance subject, another data storage unit belonging to the same attribution group as the data storage unit in which the defects stored by the defect storage unit has occurred, on the basis of an occurrence history of the defects that occurred in the data storage unit and the attribution group stored by the attribution group storage unit. The storage device also includes a preventive-maintenance performing unit that performs preventive-maintenance on data stored in the other data storage unit extracted by the preventive-maintenance-subject extracting unit.Type: ApplicationFiled: April 20, 2011Publication date: January 5, 2012Applicant: Fujitsu LimitedInventors: Akira SAMPEI, Fumio Hanzawa, Hiroaki Sato