Abstract: A display device includes a display control circuit. The display control circuit includes: an arithmetic unit obtaining a video signal, and calculating, in accordance with the video signal, an average voltage value of a source signal in a display period; and a controller and a signal synthesizer supplying, in the display period, a source signal, based on the video signal, from a source drive circuit to a plurality of source lines, and supplying, in a suspension period, a source signal, having the average voltage value, from a source drive circuit to each of the source lines.

Abstract: A display device includes a display control circuit. The display control circuit includes: an arithmetic unit obtaining a video signal, and calculating, in accordance with the video signal, an average voltage value of a source signal in a display period; and a controller and a signal synthesizer supplying, in the display period, a source signal, based on the video signal, from a source drive circuit to a plurality of source lines, and supplying, in a suspension period, a source signal, having the average voltage value, from a source drive circuit to each of the source lines.

Abstract: The TFT substrate (10) of this liquid crystal display device (100) includes: a TFT (11) which is provided for each pixel; an upper electrode (12) which is electrically connected to the TFT's drain electrode (11d); a lower electrode (13) which is arranged under the upper electrode; and a dielectric layer (14) which is arranged between the upper and lower electrodes. Its counter substrate (20) includes a counter electrode (21) which faces the upper electrode. The upper electrode has first and second regions (R1, R2) which have mutually different electrode structures, and a third region (R3) which electrically connects the first and second regions to the drain electrode. The third region of the upper electrode includes a symmetrical connecting portion (12c) that is a conductive film pattern, of which the shape is substantially symmetrical with respect to a virtual line (L1) that splits each pixel into two adjacent regions in a row direction.

Abstract: In a liquid crystal display apparatus, an angle of orientation of a first extension orientation of a first slit is not greater than an angle of orientation of a first director orientation, an angle of orientation of a second extension orientation of a second slit is not smaller than an angle of orientation of a second director orientation, and a difference between the angle of orientation of the second extension orientation and the angle of orientation of the second director orientation is greater than a difference between the angle of orientation of the first extension orientation and the angle of orientation of the first director orientation.

Abstract: A liquid crystal display apparatus includes an electrode and a slit formation region provided in the electrode and extending in a direction of extension of a boundary line, a first alignment region and a third alignment region are formed such that liquid crystal molecules are aligned toward a first director orientation, a second alignment region and a fourth alignment region are formed such that liquid crystal molecules are aligned toward a second director orientation greater in an angle of orientation than the first director orientation, an angle of orientation of a first slit orientation is not greater than an angle of orientation of the first director orientation, and an angle of orientation of a second slit orientation is not smaller than an angle of orientation of the second director orientation.

Abstract: A liquid crystal display device includes: a liquid crystal layer extending at least in a display region; first and second substrates affixed to each other so as to sandwich the liquid crystal layer therebetween; and a pair of polarization plates disposed to sandwich these substrates therebetween. The first substrate is provided with a pixel electrode corresponding to each of a plurality of pixels. The second substrate is provided with a counter electrode so as to face the pixel electrode. A first alignment film is disposed on the pixel electrode. A second alignment film is disposed on the counter electrode. The pixels each include a plurality of domains having different combinations of alignment directions of the first and second alignment films. The pixel electrode has a slit group along at least a part of an outline of the pixel electrode and in the vicinity of the outline.

Abstract: The TFT substrate (10) of this liquid crystal display device (100) includes: a TFT (11) which is provided for each pixel; an upper electrode (12) which is electrically connected to the TFT's drain electrode (11d); a lower electrode (13) which is arranged under the upper electrode; and a dielectric layer (14) which is arranged between the upper and lower electrodes. Its counter substrate (20) includes a counter electrode (21) which faces the upper electrode. The upper electrode has first and second regions (R1, R2) which have mutually different electrode structures, and a third region (R3) which electrically connects the first and second regions to the drain electrode. The third region of the upper electrode includes a symmetrical connecting portion (12c) that is a conductive film pattern, of which the shape is substantially symmetrical with respect to a virtual line (L1) that splits each pixel into two adjacent regions in a row direction.

Abstract: Disclosed is a liquid crystal display device of active matrix type. Each pixel electrode (1) includes either a single regional electrode (2) or two or more regional electrodes (2) which are electrically connected to each other. The or each regional electrode is provided with: a first electrode (cross-shaped electrode) (3) which has a pattern dividing a first region into a plurality of second regions (R1, R2, R3, and R4); and a plurality of stripe electrodes (4) which are provided in each of the second regions so as to extend from the first electrode and so as to be separated from each other by a distance. A storage capacitor line (CSL) is provided facing one of pixel electrodes (1) in a film thickness direction to form a storage capacitor. The storage capacitor line (CSL) is provided so as not to extend facing an edge (2e, 2e?) of a first region in the film thickness direction parallelly to the edge (2e, 2e?).

Abstract: An overshooting process is carried out, in an LCD device (1) whose LC layer thicknesses meet pixel R>pixel G>pixel B, so as to respectively set first through third output gray scales of current frame based on (i) first through third input gray scales of the current frame (current frame data) and (ii) first through third gray scales of frame which is one frame before the current frame (previous frame data). The first through third output gray scales are respectively set for the first through third pixels based on the thicknesses of the respective first through third liquid crystal layers so as to meet pixel R>pixel G>pixel B. This equalizes liquid crystal response speeds of the respective pixels R, G, and B, and therefore allows an improvement in display quality of the LCD device (1) having a multi gap structure.

Abstract: In a liquid crystal display apparatus, an angle of orientation of a first extension orientation of a first slit is not greater than an angle of orientation of a first director orientation, an angle of orientation of a second extension orientation of a second slit is not smaller than an angle of orientation of a second director orientation, and a difference between the angle of orientation of the second extension orientation and the angle of orientation of the second director orientation is greater than a difference between the angle of orientation of the first extension orientation and the angle of orientation of the first director orientation.

Abstract: A liquid crystal display apparatus includes an electrode and a slit formation region provided in the electrode and extending in a direction of extension of a boundary line, a first alignment region and a third alignment region are formed such that liquid crystal molecules are aligned toward a first director orientation, a second alignment region and a fourth alignment region are formed such that liquid crystal molecules are aligned toward a second director orientation greater in an angle of orientation than the first director orientation, an angle of orientation of a first slit orientation is not greater than an angle of orientation of the first director orientation, and an angle of orientation of a second slit orientation is not smaller than an angle of orientation of the second director orientation.

Abstract: A liquid crystal display device includes a liquid crystal layer extending in a display region; and a TFT substrate and a counter substrate affixed to each other so as to sandwich the liquid crystal layer therebetween. The TFT substrate is provided with a pixel electrode corresponding to each of a plurality of pixels. The counter substrate is provided with a counter electrode. A first alignment film is disposed on the surface of the pixel electrode that faces the liquid crystal layer. A second alignment film is disposed on the surface of the counter electrode that faces the liquid crystal layer. The pixels each include a plurality of domains having different combinations of alignment directions of the first and second alignment films. A slit is provided in the counter electrode at least in a part of a region corresponding to a boundary between the pixels adjacent to each other.

Abstract: A liquid crystal display device includes: a liquid crystal layer extending at least in a display region; first and second substrates affixed to each other so as to sandwich the liquid crystal layer therebetween; and a pair of polarization plates disposed to sandwich these substrates therebetween. The first substrate is provided with a pixel electrode corresponding to each of a plurality of pixels. The second substrate is provided with a counter electrode so as to face the pixel electrode. A first alignment film is disposed on the pixel electrode. A second alignment film is disposed on the counter electrode. The pixels each include a plurality of domains having different combinations of alignment directions of the first and second alignment films. The pixel electrode has a slit group along at least a part of an outline of the pixel electrode and in the vicinity of the outline.

Abstract: Disclosed is a liquid crystal display device of active matrix type. Each pixel electrode (1) includes either a single regional electrode (2) or two or more regional electrodes (2) which are electrically connected to each other. The or each regional electrode is provided with: a first electrode (cross-shaped electrode) (3) which has a pattern dividing a first region into a plurality of second regions (R1, R2, R3, and R4); and a plurality of stripe electrodes (4) which are provided in each of the second regions so as to extend from the first electrode and so as to be separated from each other by a distance. A storage capacitor line (CSL) is provided facing one of pixel electrodes (1) in a film thickness direction to form a storage capacitor. The storage capacitor line (CSL) is provided so as not to extend facing an edge (2e, 2e?) of a first region in the film thickness direction parallelly to the edge (2e, 2e?).

Abstract: An overshooting process is carried out, in an LCD device (1) whose LC layer thicknesses meet pixel R>pixel G>pixel B, so as to respectively set first through third output gray scales of current frame based on (i) first through third input gray scales of the current frame (current frame data) and (ii) first through third gray scales of frame which is one frame before the current frame (previous frame data). The first through third output gray scales are respectively set for the first through third pixels based on the thicknesses of the respective first through third liquid crystal layers so as to meet pixel R>pixel G>pixel B. This equalizes liquid crystal response speeds of the respective pixels R, G, and B, and therefore allows an improvement in display quality of the LCD device (1) having a multi gap structure.

Abstract: Each of a gate driver and a source driver periodically receives a clock signal and a start pulse, where the start pulse has a certain width and is shifted as shift data in the gate driver or source driver in synchronism with the clock signal. A logic circuit composed of an NAND gate and an inverter receives the start pulse and the shift data, the shift data being the output that is supplied after a predetermined delay from the last stage with respect to the shift direction. The output of the inverter is used to test scanning circuits. This provides a display device and a scanning circuit testing method, which enable the scanning circuits to be judged both surely and quickly, without increasing the area or complexity of the circuit.

Abstract: Each of a gate driver and a source driver periodically receives a clock signal and a start pulse, where the start pulse has a certain width and is shifted as shift data in the gate driver or source driver in synchronism with the clock signal. A logic circuit composed of an NAND gate and an inverter receives the start pulse and the shift data, the shift data being the output that is supplied after a predetermined delay from the last stage with respect to the shift direction. The output of the inverter is used to test scanning circuits. This provides a display device and a scanning circuit testing method, which enable the scanning circuits to be judged both surely and quickly, without increasing the area or complexity of the circuit.

Abstract: Each of a gate driver and a source driver periodically receives a clock signal and a start pulse, where the start pulse has a certain width and is shifted as shift data in the gate driver or source driver in synchronism with the clock signal. A logic circuit composed of an NAND gate and an inverter receives the start pulse and the shift data, the shift data being the output that is supplied after a predetermined delay from the last stage with respect to the shift direction. The output of the inverter is used to test scanning circuits. This provides a display device and a scanning circuit testing method, which enable the scanning circuits to be judged both surely and quickly, without increasing the area or complexity of the circuit.

Abstract: Each of a gate driver and a source driver periodically receives a clock signal and a start pulse, where the start pulse has a certain width and is shifted as shift data in the gate driver or source driver in synchronism with the clock signal. A logic circuit composed of an NAND gate and an inverter receives the start pulse and the shift data, the shift data being the output that is supplied after a predetermined delay from the last stage with respect to the shift direction. The output of the inverter is used to test scanning circuits. This provides a display device and a scanning circuit testing method, which enable the scanning circuits to be judged both surely and quickly, without increasing the area or complexity of the circuit.