Patents by Inventor Akira Shiokawa

Akira Shiokawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8053989
    Abstract: A plasma display panel includes a front panel including a glass substrate, a display electrode formed thereon, a dielectric layer formed so as to cover the display electrode, and a protective layer formed on the dielectric layer; and a rear panel disposed facing the front panel so that discharge space is formed and including an address electrode formed in a direction intersecting the display electrode, and a barrier rib for partitioning the discharge space. The dielectric layer of the front panel contains bismuth oxide and calcium oxide without containing lead, and does not contain lead. The protective layer on the dielectric layer is formed by forming a base film on the second dielectric layer and attaching a plurality of crystal particles made of metal oxide to the base film so as to be distributed over an entire surface of the base film.
    Type: Grant
    Filed: February 25, 2009
    Date of Patent: November 8, 2011
    Assignee: Panasonic Corporation
    Inventors: Koyo Sakamoto, Akira Shiokawa, Kaname Mizokami, Shinichiro Ishino, Hiroyuki Kado, Yoshinao Ooe, Hideji Kawarazaki, Kazuo Uetani
  • Publication number: 20110266949
    Abstract: A plasma display panel includes a front panel including a substrate, a display electrode formed on the substrate, a dielectric layer formed so as to cover the display electrode, and a protective layer formed on the dielectric layer; and a rear panel disposed facing the front panel so that a discharge space is formed, and including an address electrode formed in a direction intersecting the display electrode and a barrier rib for partitioning the discharge space. The protective layer is formed by forming a base film on the dielectric layer and attaching a plurality of aggregated particles of a plurality of crystal particles of metal oxide to the base film so that a plurality of aggregated particles are distributed over its entire surface.
    Type: Application
    Filed: July 11, 2011
    Publication date: November 3, 2011
    Inventors: Kaname Mizokami, Shinichiro Ishino, Koyo Sakamoto, Akira Shiokawa, Hiroyuki Kadou, Yoshinao Ooe, Hideji Kawarazaki, Kazuo Uetani
  • Publication number: 20110210663
    Abstract: A plasma display panel includes a front panel including a glass substrate, a display electrode formed thereon, a dielectric layer formed so as to cover the display electrode, and a protective layer formed on the dielectric layer; and a rear panel disposed facing the front panel so that discharge space is formed and including an address electrode formed in a direction intersecting the display electrode, and a barrier rib for partitioning the discharge space. The dielectric layer of the front panel contains bismuth oxide and calcium oxide without containing lead, and does not contain lead. The protective layer on the dielectric layer is formed by forming a base film on the second dielectric layer and attaching a plurality of crystal particles made of metal oxide to the base film so as to be distributed over an entire surface of the base film.
    Type: Application
    Filed: February 25, 2009
    Publication date: September 1, 2011
    Inventors: Koyo Sakamoto, Akira Shiokawa, Kaname Mizokami, Shinichiro Ishino, Hiroyuki Kado, Yoshinao Ooe, Hideji Kawarazaki, Kazuo Uetani
  • Publication number: 20110198993
    Abstract: A plasma display panel includes a front panel including a glass front substrate, a display electrode formed on the substrate, a dielectric layer formed so as to cover the display electrode, and a protective layer formed on the dielectric layer; and a rear panel disposed facing the front panel so that discharge space is formed and including an address electrode formed in a direction intersecting the display electrode, and a plurality of longitudinal barrier ribs arranged in parallel to the address electrode and lateral barrier ribs. The protective layer is formed by forming a base film on the dielectric layer and attaching a plurality of crystal particles made of metal oxide to the base film so as to be distributed over an entire surface. The barrier ribs are formed so that the height of the lateral barrier ribs is lower than that of longitudinal barrier ribs.
    Type: Application
    Filed: February 26, 2009
    Publication date: August 18, 2011
    Inventors: Akira Shiokawa, Kaname Mizokami, Shinichiro Ishino, Koyo Sakamoto, Hiroyuki Kado, Yoshinao Ooe, Hideji Kawarazaki, Kazuo Uetani
  • Publication number: 20110006676
    Abstract: A plasma display panel has a dielectric layer on a front panel, which includes a first dielectric layer covering a display electrode and containing bismuth oxide without containing lead, and a second dielectric layer formed on the first dielectric layer and containing bismuth oxide without containing lead. The content of bismuth oxide in the second dielectric layer is made to be smaller than a content of bismuth oxide in the first dielectric layer. A protective layer on the dielectric layer is formed by forming a base film on the dielectric layer and attaching a plurality of crystal particles made of metal oxide to the base film so as to be distributed over an entire surface of the base film.
    Type: Application
    Filed: February 25, 2009
    Publication date: January 13, 2011
    Inventors: Kazuo Uetani, Kaname Mizokami, Shinichiro Ishino, Koyo Sakamoto, Hiroyuki Kado, Akira Shiokawa, Yoshinao Ooe, Hideji Kawarazaki
  • Patent number: 7842342
    Abstract: A method for manufacturing a protective layer such that when the protective layer is formed in a film-forming chamber, the partial pressure of water in the film-forming chamber is controlled by the exhaust velocity of the water in the film-forming chamber. During formation of the protective layer the total pressure in the film-forming chamber is kept constant. In addition, the partial pressure of the water in the film-forming chamber is controlled while introducing a gas into the film-forming chamber, thereby controlling the ratio of the partial pressure of hydrogen to the partial pressure of oxygen in the film-forming chamber.
    Type: Grant
    Filed: September 11, 2006
    Date of Patent: November 30, 2010
    Assignee: Panasonic Corporation
    Inventors: Yoshinao Ooe, Kazuo Uetani, Akira Shiokawa, Kaname Mizokami, Hiroyuki Kado
  • Publication number: 20100112891
    Abstract: In the method of producing a PDP, the protective layer is produced in the following steps. First, deposit a base film on the dielectric layer, and then apply a crystalline particle paste produced by dispersing plural crystalline particles made of metal oxide, onto the base film to form a crystalline particle paste film. After that, fire the base film and crystalline particle paste film to make the plural crystalline particles adhere so as to be distributed over the whole surface. The crystalline particle paste has a viscosity between 1 Pa·s and 30 Pa·s inclusive at a shear velocity of 1.0 s?1.
    Type: Application
    Filed: March 10, 2009
    Publication date: May 6, 2010
    Inventors: Shinichiro Ishino, Kaname Mizokami, Koyo Sakamoto, Akira Shiokawa, Hiroyuki Kado, Yoshinao Ooe, Hideji Kawarazaki, Kazuo Uetani
  • Publication number: 20100102722
    Abstract: A plasma display panel includes a front panel including a substrate, a display electrode formed on the substrate, a dielectric layer formed so as to cover the display electrode, and a protective layer formed on the dielectric layer; and a rear panel disposed facing the front panel so that discharge space is formed, and including an address electrode formed in a direction intersecting the display electrode and a barrier rib for partitioning the discharge space. The protective layer is formed by forming a base film on the dielectric layer and attaching a plurality of aggregated particles of a plurality of crystal particles of metal oxide to the base film so that a plurality of aggregated particles are distributed over the entire surface, and the base film is made of MgO containing Al.
    Type: Application
    Filed: November 12, 2008
    Publication date: April 29, 2010
    Inventors: Kaname Mizokami, Shinichiro Ishino, Koyo Sakamoto, Akira Shiokawa, Hiroyuki Kadou, Yoshinao Ooe, Hideji Kawarazaki, Kazuo Uetani
  • Publication number: 20100102723
    Abstract: A plasma display panel includes a front panel including a substrate, a display electrode formed on the substrate, a dielectric layer formed so as to cover the display electrode, and a protective layer formed on the dielectric layer; and a rear panel disposed facing the front panel so that discharge space is formed, and including an address electrode formed in a direction intersecting the display electrode and a barrier rib for partitioning the discharge space. The protective layer is formed by forming a base film on the dielectric layer and attaching a plurality of aggregated particles of a plurality of crystal particles of metal oxide to the base film so that a plurality of aggregated particles are distributed over its entire surface.
    Type: Application
    Filed: November 12, 2008
    Publication date: April 29, 2010
    Inventors: Kaname Mizokami, Shinichiro Ishino, Koyo Sakamoto, Akira Shiokawa, Hiroyumi Kadou, Yoshinao Ooe, Hideji Kawarazaki, Kazuo Uetani
  • Publication number: 20100084973
    Abstract: A plasma display panel includes a front panel including a substrate, a display electrode formed on the substrate, a dielectric layer formed so as to cover the display electrode, and a protective layer formed on the dielectric layer; and a rear panel disposed facing the front panel so that discharge space is formed, and including an address electrode formed in a direction intersecting the display electrode and a barrier rib for partitioning the discharge space. The protective layer is formed by forming a base film on the dielectric layer and attaching a plurality of aggregated particles of a plurality of crystal particles of metal oxide to the base film so that a plurality of aggregated particles are distributed over the entire surface, and the crystal particle has a crystal face having a shape of polyhedron with seven faces or more.
    Type: Application
    Filed: November 12, 2008
    Publication date: April 8, 2010
    Inventors: Kaname Mizokami, Shinichiro Ishino, Koyo Sakamoto, Akira Shiokawa, Hiroyuki Kadou, Yoshinao Ooe, Hideji Kawarazaki, Kazuo Uetani
  • Publication number: 20100047441
    Abstract: A method of manufacturing a plasma display panel that includes a front panel including a substrate, a display electrode formed on the substrate, a dielectric layer formed so as to cover the display electrode, and a protective layer formed on the dielectric layer; and a rear panel disposed facing the front panel so that discharge space is formed and including an address electrode formed in a direction intersecting the display electrode, and a barrier rib for partitioning the discharge space. Forming the protective layer on the front panel includes: vapor-depositing a base film on the dielectric layer; forming an aggregated particle paste film containing an aggregated particle of a plurality of crystal particles of metal oxide on the base film; and firing the base film and the aggregated particle paste film, thereby attaching a plurality of the aggregated particles on the base film.
    Type: Application
    Filed: November 12, 2008
    Publication date: February 25, 2010
    Inventors: Kaname Mizokami, Shinichiro Ishino, Koyo Sakamoto, Akira Shiokawa, Hiroyuki Kadou, Yoshinao Ooe, Hideji Kawarazaki, Kazuo Uetani
  • Publication number: 20090017189
    Abstract: An apparatus for forming a protective layer of magnesium oxide on a front glass substrate (11) in an evaporation chamber (201) includes the following: oxygen outlet openings (222) for introducing oxygen into the evaporation chamber (201); water vapor outlet openings (210) for introducing water vapor into the evaporation chamber (201) from the downstream side in the transfer direction of the front glass substrate (11); a mass analyzer (224) for measuring the ionic strength of hydrogen and the ionic strength of oxygen in the evaporation chamber (201); and mass flow controllers (215) and (221) for controlling the introduction amount of the water vapor and the introduction amount of the oxygen, respectively, by the ionic strengths measured by the mass analyzer (224).
    Type: Application
    Filed: September 11, 2006
    Publication date: January 15, 2009
    Inventors: Kazuo Uetani, Kaname Mizokami, Yoshinao Ooe, Akira Shiokawa, Hiroyuki Kado
  • Patent number: 7348729
    Abstract: A plasma display panel having excellent electron emission properties and a method of making the same. A plasma display panel is provided with a protective layer having a dense growth of columnar crystals formed on a dielectric layer. A middle layer can be provided for improving orientation of the columnar crystals. A heating step creates seed crystals to increase the width and growth of columnar crystals with a selective orientation and greater diameter. The area of any exposed surfaces on the protective layer becomes smaller and absorption of impurities decreases. A layer of grain crystals or an amorphic crystal layer is initially deposited on the dielectric layer to establish wider area seed crystals of a desired orientation. A vacuum evaporated complimentary protective layer can then be grown with the improved configuration.
    Type: Grant
    Filed: August 28, 2001
    Date of Patent: March 25, 2008
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kanako Miyashita, Koichi Kotera, Akira Shiokawa
  • Publication number: 20070298162
    Abstract: An apparatus for manufacturing a protective layer includes a film-forming chamber (32); gas inlets (47) for introducing at least gas into the film-forming chamber (32); exhaust pumps (43) for evacuating the film-forming chamber (32); a cryotrap for controlling the exhaust velocity of water independent of the exhaust pumps (43); and a temperature controller for controlling the cooling temperature of the cryotrap. The exhaust velocity of the water is controlled by the cooling temperature of the cryotrap so as to form a protective layer susceptible to the partial pressure of water always under the same conditions. This results in a protective layer having resistance to sputtering and excellent secondary emission characteristics.
    Type: Application
    Filed: September 11, 2006
    Publication date: December 27, 2007
    Inventors: Yoshinao Ooe, Kazuo Uetani, Akira Shiokawa, Kaname Mizokami, Hiroyuki Kado
  • Patent number: 7235928
    Abstract: A gas discharge panel capable of high-speed driving at a low drive voltage, while suppressing the occurrence of write errors in a write period, and a manufacturing method for the same. To achieve this, in the gas discharge panel of the present invention, a secondary gas formed from at least one of carbon dioxide, water vapor, oxygen and nitrogen is induced into discharge spaces 30 evacuated until the residual gas pressure is 0.02 mPa or less, and an He—Xe or Ne—Xe rare gas (discharge gas) is induced into discharge spaces 30. The amount of the secondary gas included within discharge spaces 30 when, for example, carbon dioxide is included therein, is suitably set in terms of both a discharge starting voltage and an electron emission ability, so that the partial pressure of the carbon dioxide is in a range of 0.05 mPa to 0.5 mPa inclusive.
    Type: Grant
    Filed: May 31, 2002
    Date of Patent: June 26, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Akira Shiokawa, Koji Akiyama, Tetsuya Imai, Katsutoshi Shindo, Hidetaka Higashino, Koichi Kotera, Kanako Miyashita
  • Patent number: 7176851
    Abstract: When applying sustain pulses to each discharge cell in a gas discharge panel, a pulse of the opposite polarity is briefly applied immediately before the leading edge of each sustain pulse. Or, the absolute voltage of each sustain pulse is set higher during a certain period from the leading edge of the sustain pulse than during a period from the lapse of the certain period to the trailing edge of the sustain pulse, and a pulse of the opposite polarity is briefly applied immediately after the trailing edge of the sustain pulse. As a result, discharge delays during a discharge sustain period are suppressed to improve image quality, and reactive currents are reduced to improve luminous efficiency.
    Type: Grant
    Filed: March 13, 2001
    Date of Patent: February 13, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Akira Shiokawa, Ryuichi Murai, Yusuke Takada
  • Patent number: 7075234
    Abstract: A discharge panel capable of high-quality display by preventing erroneous discharge between adjacent lines in a sustaining electrode or the like. A sectional shape in a direction orthogonal to the longitudinal directions of both a first display electrode (101a) and a second display electrode (101b) has a stepped shape, a film thickness of a discharge gap (Gap1) side portion is greater than that on a non-discharge gap side, the film thickness of the respective steps being specified as L1, L2, L3 (L1>L2>L3). Accordingly, a discharge start voltage on the discharge gap side is lower than that on the non-discharge gap side even when the discharge gap and the non-discharge gap have the same width geometrically, thereby reducing erroneous discharge between adjacent cells positioned on an adjacent lines.
    Type: Grant
    Filed: February 12, 2002
    Date of Patent: July 11, 2006
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Akira Shiokawa, Ryuichi Murai, Yuusuke Takada, Katutoshi Shindo
  • Patent number: 7070471
    Abstract: A manufacturing apparatus for a PDP includes a unit for forming a protective layer protecting a dielectric layer on a first plate, a unit for baking a phosphor layer applied on a second plate, a unit for sealing the first and second plates arranged so that the protective layer faces the phosphor layer, and a unit for baking the first and second plates while exhausting a space between them. The four units are placed in one or more closed chamber. When the apparatus is driven, spaces in and between the closed chambers each contain a gas atmosphere with vapor partial pressure of 10 mPa or lower, or with a pressure of 1 Pa or lower, where the protective layer and the phosphor layer exhibit less water-absorbing property, preventing degradation of the PDP performances. The protective layer does not contact with atmospheric carbonic acid gas, preventing alteration thereof.
    Type: Grant
    Filed: March 29, 2001
    Date of Patent: July 4, 2006
    Assignee: Matsushita Electric Industrial Co. Ltd.
    Inventors: Akira Shiokawa, Hiroyosi Tanaka, Yoshiki Sasaki, Masafumi Ookawa, Junichi Hibino
  • Publication number: 20060132039
    Abstract: A gas discharge panel and method of providing a matrix of cells filled with a discharge gas and having plural pairs of display electrodes extending in a row direction of the matrix. Each pair of display electrodes comprise (a) two bus lines parallel to each other and extending in the row direction of the matrix, (b) one or more inner protrusions arranged within each cell on an inner side of one or both of the bus lines to protrude toward an inner side of an opposite bus line, and (c) one or more outer protrusions arranged to protrude from an outer side of one or both of the bus lines. A shortest gap between each pair of display electrodes is a gap between one of the bus lines and the inner protrusions on the opposite bus lines or a gap between the inner protrusions on both of the bus lines.
    Type: Application
    Filed: December 29, 2005
    Publication date: June 22, 2006
    Inventors: Ryuichi Murai, Yuusuke Takada, Akira Shiokawa, Hiroyosi Tanaka
  • Patent number: 7045962
    Abstract: A gas discharge panel to increase the illuminance efficiency and a method of manufacturing includes providing a plurality of cells arranged in a matrix between a pair of substrates. Pairs of display electrodes are arranged on an inner surface of one of the substrates and include two bus lines lying parallel to each other with one or more inner protrusions arranged within each cell relative to the bus lines. This arrangement provides a relatively short discharge gap between the pair of display electrodes.
    Type: Grant
    Filed: January 21, 2000
    Date of Patent: May 16, 2006
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Ryuichi Murai, Yuusuke Takada, Akira Shiokawa, Hiroyosi Tanaka