Patents by Inventor Akira Tomono
Akira Tomono has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11551973Abstract: A method for manufacturing a semiconductor device includes providing an adhesive film over a first surface of a semiconductor wafer on which a semiconductor device layer and a bump electrically connected to the semiconductor device layer are formed, forming a slit in the adhesive film, fragmenting the semiconductor wafer into semiconductor chips along the slit, and connecting the bump to a wiring of a circuit board within the adhesive film.Type: GrantFiled: March 1, 2021Date of Patent: January 10, 2023Assignee: KIOXIA CORPORATIONInventors: Takanobu Ono, Keisuke Tokubuchi, Akira Tomono
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Patent number: 11309219Abstract: A method for manufacturing a semiconductor device of an embodiment includes: dividing a semiconductor wafer including a plurality of chip areas each having a columnar electrode and dicing areas, along the dicing areas to form a plurality of semiconductor chips; sticking a first resin film on the plurality of semiconductor chips while filling parts of the first resin film in gaps each present between adjacent ones of the plurality of semiconductor chips; forming trenches narrower in width than the gaps in the first resin film filled in the gaps; and sequentially picking up the plurality of semiconductor chips each having the first resin film, and mounting the picked semiconductor chip on a substrate.Type: GrantFiled: March 5, 2020Date of Patent: April 19, 2022Assignee: Kioxia CorporationInventors: Akira Tomono, Keisuke Tokubuchi, Takanobu Ono
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Publication number: 20220059407Abstract: A method for manufacturing a semiconductor device includes providing an adhesive film over a first surface of a semiconductor wafer on which a semiconductor device layer and a bump electrically connected to the semiconductor device layer are formed, forming a slit in the adhesive film, fragmenting the semiconductor wafer into semiconductor chips along the slit, and connecting the bump to a wiring of a circuit board within the adhesive film.Type: ApplicationFiled: March 1, 2021Publication date: February 24, 2022Inventors: Takanobu ONO, Keisuke TOKUBUCHI, Akira TOMONO
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Patent number: 11139208Abstract: A semiconductor device includes a semiconductor wafer chip, a semiconductor device layer, and a reflectance reducing layer. The semiconductor wafer chip includes a device region and a peripheral region around the device region. The peripheral region includes a plurality of voids aligned along a side surface of the semiconductor wafer chip at a predetermined depth from a first surface of the semiconductor wafer chip. The semiconductor device element layer is on the first surface in the device region. The reflectance reducing layer is on the first surface of the semiconductor wafer chip in the peripheral region, that reduces a reflection of laser light incident from a second surface of the semiconductor wafer chip.Type: GrantFiled: September 3, 2019Date of Patent: October 5, 2021Assignee: TOSHIBA MEMORY CORPORATIONInventors: Takanobu Ono, Tsutomu Fujita, Ippei Kume, Akira Tomono
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Publication number: 20210082761Abstract: A method for manufacturing a semiconductor device of an embodiment includes: dividing a semiconductor wafer including a plurality of chip areas each having a columnar electrode and dicing areas, along the dicing areas to form a plurality of semiconductor chips; sticking a first resin film on the plurality of semiconductor chips while filling parts of the first resin film in gaps each present between adjacent ones of the plurality of semiconductor chips; forming trenches narrower in width than the gaps in the first resin film filled in the gaps; and sequentially picking up the plurality of semiconductor chips each having the first resin film, and mounting the picked semiconductor chip on a substrate.Type: ApplicationFiled: March 5, 2020Publication date: March 18, 2021Applicant: Kioxia CorporationInventors: Akira TOMONO, Keisuke Tokubuchi, Takanobu Ono
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Patent number: 10950468Abstract: A semiconductor manufacturing apparatus according to an embodiment irradiates a semiconductor substrate with laser to form modified regions along an intended cut line in the semiconductor substrate. A light source emits the laser. An optical system comprises an objective lens configured to focus the laser in the semiconductor substrate. A light modulator is capable of modulating an energy density distribution of the laser. A controller controls the light modulator to displace a peak position of the energy density distribution of the laser from an optical axis of the objective lens in a relative movement direction of the optical system with respect to the semiconductor substrate.Type: GrantFiled: March 5, 2018Date of Patent: March 16, 2021Assignee: TOSHIBA MEMORY CORPORATIONInventors: Makoto Minaminaka, Tsutomu Fujita, Keisuke Tokubuchi, Akira Tomono, Takanobu Ono
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Patent number: 10892232Abstract: A semiconductor device according to an embodiment includes a semiconductor substrate comprising a first face, and a second face on an opposite side to the first face. A semiconductor element is provided on the first face of the semiconductor substrate. A polycrystalline or non-crystalline first material layer is provided at least on an outer edge of the first face of the semiconductor substrate. A second material layer is provided on the second face of the semiconductor substrate. The second material layer transmits laser light.Type: GrantFiled: September 3, 2019Date of Patent: January 12, 2021Assignee: Toshiba Memory CorporationInventors: Takanobu Ono, Tsutomu Fujita, Ippei Kume, Akira Tomono
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Publication number: 20200294934Abstract: A semiconductor device according to an embodiment includes a semiconductor substrate comprising a first face, and a second face on an opposite side to the first face. A semiconductor element is provided on the first face of the semiconductor substrate. A polycrystalline or non-crystalline first material layer is provided at least on an outer edge of the first face of the semiconductor substrate. A second material layer is provided on the second face of the semiconductor substrate. The second material layer transmits laser light.Type: ApplicationFiled: September 3, 2019Publication date: September 17, 2020Applicant: Toshiba Memory CorporationInventors: Takanobu ONO, Tsutomu FUJITA, Ippei KUME, Akira TOMONO
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Publication number: 20200294856Abstract: A semiconductor device includes a semiconductor wafer chip, a semiconductor device layer, and a reflectance reducing layer. The semiconductor wafer chip includes a device region and a peripheral region around the device region. The peripheral region includes a plurality of voids aligned along a side surface of the semiconductor wafer chip at a predetermined depth from a first surface of the semiconductor wafer chip. The semiconductor device element layer is on the first surface in the device region. The reflectance reducing layer is on the first surface of the semiconductor wafer chip in the peripheral region, that reduces a reflection of laser light incident from a second surface of the semiconductor wafer chip.Type: ApplicationFiled: September 3, 2019Publication date: September 17, 2020Inventors: Takanobu ONO, Tsutomu FUJITA, Ippei KUME, Akira TOMONO
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Patent number: 10350711Abstract: A semiconductor device is provided with a semiconductor substrate. A semiconductor element is provided on a first face of the semiconductor substrate. An energy absorbing film is provided on the first face, to absorb optical energy to generate heat. A first insulation film is provided on the semiconductor element and on the energy absorbing film. A second insulation film is provided on a second face of the semiconductor substrate, the second face being opposite to the first face. A first modified layer is provided on a side face of the semiconductor substrate, the side face being located between an outer edge of the first face and an outer edge of the second face. A second modified layer is provided on the side face between the energy absorbing film and the first modified layer. A cleavage face is provided on the side face between the first and second modified layers.Type: GrantFiled: March 9, 2018Date of Patent: July 16, 2019Assignee: TOSHIBA MEMORY CORPORATIONInventors: Tsutomu Fujita, Akira Tomono, Takanobu Ono
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Publication number: 20190084080Abstract: A semiconductor device is provided with a semiconductor substrate. A semiconductor element is provided on a first face of the semiconductor substrate. An energy absorbing film is provided on the first face, to absorb optical energy to generate heat. A first insulation film is provided on the semiconductor element and on the energy absorbing film. A second insulation film is provided on a second face of the semiconductor substrate, the second face being opposite to the first face. A first modified layer is provided on a side face of the semiconductor substrate, the side face being located between an outer edge of the first face and an outer edge of the second face. A second modified layer is provided on the side face between the energy absorbing film and the first modified layer. A cleavage face is provided on the side face between the first and second modified layers.Type: ApplicationFiled: March 9, 2018Publication date: March 21, 2019Applicant: TOSHIBA MEMORY CORPORATIONInventors: Tsutomu FUJITA, Akira TOMONO, Takanobu ONO
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Publication number: 20190080940Abstract: A semiconductor manufacturing apparatus according to an embodiment irradiates a semiconductor substrate with laser to form modified regions along an intended cut line in the semiconductor substrate. A light source emits the laser. An optical system comprises an objective lens configured to focus the laser in the semiconductor substrate. A light modulator is capable of modulating an energy density distribution of the laser. A controller controls the light modulator to displace a peak position of the energy density distribution of the laser from an optical axis of the objective lens in a relative movement direction of the optical system with respect to the semiconductor substrate.Type: ApplicationFiled: March 5, 2018Publication date: March 14, 2019Applicant: TOSHIBA MEMORY CORPORATIONInventors: Makoto MINAMINAKA, Tsutomu FUJITA, Keisuke TOKUBUCHI, Akira TOMONO, Takanobu ONO
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Patent number: 9490170Abstract: A method for manufacturing a semiconductor device includes preparing a structure including a semiconductor substrate having a plurality of semiconductor elements thereon, a cover layer covering the semiconductor elements, a supporting substrate, and an adhesive layer between the first adhesive layer and the supporting substrate, removing side edge portions of the semiconductor substrate and the adhesive layer, such that a side surface of the cover layer is exposed, forming, in the supporting substrate, fragile portions, the fragile portions extending in a first direction, attaching an adhesive sheet on a surface of the supporting substrate that is opposite to a surface that is in contact with the adhesive layer, and pulling on the adhesive sheet in a second direction different from the first direction, to peel off the supporting substrate and the adhesive layer from the semiconductor substrate having the semiconductor elements.Type: GrantFiled: February 27, 2015Date of Patent: November 8, 2016Assignee: Kabushiki Kaisha ToshibaInventor: Akira Tomono
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Publication number: 20160079119Abstract: A method for manufacturing a semiconductor device includes preparing a structure including a semiconductor substrate having a plurality of semiconductor elements thereon, a cover layer covering the semiconductor elements, a supporting substrate, and an adhesive layer between the first adhesive layer and the supporting substrate, removing side edge portions of the semiconductor substrate and the adhesive layer, such that a side surface of the cover layer is exposed, forming, in the supporting substrate, fragile portions, the fragile portions extending in a first direction, attaching an adhesive sheet on a surface of the supporting substrate that is opposite to a surface that is in contact with the adhesive layer, and pulling on the adhesive sheet in a second direction different from the first direction, to peel off the supporting substrate and the adhesive layer from the semiconductor substrate having the semiconductor elements.Type: ApplicationFiled: February 27, 2015Publication date: March 17, 2016Inventor: Akira TOMONO
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Patent number: 8956917Abstract: According to one embodiment, a manufacturing method of a semiconductor device is disclosed. The method includes: (a) forming cutting grooves in an element formation surface of a semiconductor wafer on which semiconductor elements are formed; (b) applying a protection tape on the element formation surface of the semiconductor wafer; (c) grinding a rear surface of the semiconductor wafer to thin the semiconductor wafer and to divide the semiconductor wafer into a plurality of semiconductor chips on which the semiconductor elements are formed; (d) forming an adhesive layer on the rear surface of the semiconductor wafer; (e) separating and cutting the adhesive layer for each of the semiconductor chips; and (f) removing the protection tape. The (e) is performed by spraying a high-pressure air to the adhesive layer formed on the rear surface of the semiconductor wafer while melting or softening the adhesive layer by heating.Type: GrantFiled: January 19, 2012Date of Patent: February 17, 2015Assignee: Kabushiki Kaisha ToshibaInventors: Tetsuya Kurosawa, Shinya Takyu, Akira Tomono
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Publication number: 20120235282Abstract: According to one embodiment, a semiconductor device manufacturing method is disclosed. The method comprises (a) forming cut grooves in a front surface of a semiconductor wafer on which semiconductor elements are formed to partition the front surface into a plurality of regions, (b) disposing partly a resin in the cut grooves, (c) adhering a protection tape on the front surface of the semiconductor wafer, (d) thinning the semiconductor wafer by grinding a rear surface of the semiconductor wafer to reach the cut grooves, (e) forming an adhesive agent layer on the rear surface of the semiconductor wafer, and (f) dividing the semiconductor wafer into a plurality of semiconductor chips by cutting the adhesive agent layer together with the disposed resin along the cut grooves.Type: ApplicationFiled: February 14, 2012Publication date: September 20, 2012Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Akira TOMONO, Tetsuya KUROSAWA, Tsutomu FUJITA, Mika KIRITANI, Shinya TAKYU
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Publication number: 20120187542Abstract: According to one embodiment, a manufacturing method of a semiconductor device is disclosed. The method includes: (a) forming cutting grooves in an element formation surface of a semiconductor wafer on which semiconductor elements are formed; (b) applying a protection tape on the element formation surface of the semiconductor wafer; (c) grinding a rear surface of the semiconductor wafer to thin the semiconductor wafer and to divide the semiconductor wafer into a plurality of semiconductor chips on which the semiconductor elements are formed; (d) forming an adhesive layer on the rear surface of the semiconductor wafer; (e) separating and cutting the adhesive layer for each of the semiconductor chips; and (f) removing the protection tape. The (e) is performed by spraying a high-pressure air to the adhesive layer formed on the rear surface of the semiconductor wafer while melting or softening the adhesive layer by heating.Type: ApplicationFiled: January 19, 2012Publication date: July 26, 2012Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Tetsuya KUROSAWA, Shinya Takyu, Akira Tomono
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Patent number: 7934703Abstract: An apparatus includes an ultrasonic transducer; an ultrasonic propagation medium disposed so as to fill a plane of vibration of the transducer; liquid retaining means disposed so as to be in contact with an end face of the medium; and an ultrasonic focusing reflecting mechanism disposed in an ultrasonic propagation path, thereby the apparatus attains discharging into air and atomization of the liquid by use of ultrasonic waves. Atomization efficiency is enhanced by the use of an ultrasonic reflection tube, and mist emission is carried out. Use is made of a compact liquid container equipped at its bottom with an ultrasonic transmission membrane. Various types of liquids can be atomized by changing the direction of ultrasonic course.Type: GrantFiled: March 9, 2006Date of Patent: May 3, 2011Inventors: Akira Tomono, Akio Uehara
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Publication number: 20080223953Abstract: [OBJECTS AND PROBLEMS] Relating to a mist generator capable of emitting any of chemical substances used in life, such as perfumes, pharmaceuticals and pesticides, in the form of fog or vapor. An object of the invention is to attain means for efficiently atomizing liquid, means for easily and rapidly switching the type of chemical substance emitted and a compact apparatus of good maintainability. [MEANS FOR SOLVING PROBLEMS] An apparatus comprises an ultrasonic transducer; an ultrasonic propagation medium disposed so as to fill a plane of vibration of the transducer; liquid retaining means disposed so as to be in contact with an end face of the medium; and an ultrasonic focusing reflecting mechanism (concave reflection mirror) disposed in an ultrasonic propagation path, thereby the apparatus attains discharging into air and atomization of the liquid by means of ultrasonic waves. Atomization efficiency is enhanced by the use of an ultrasonic reflection tube, and mist emission is carried out.Type: ApplicationFiled: March 9, 2006Publication date: September 18, 2008Inventors: Akira Tomono, Akio Uehara
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Patent number: 7214561Abstract: A packaging assembly includes a substrate; chip-site lands disposed on the first surface; first solder balls connected to the chip-site lands; second solder balls connected to the first solder balls including solder materials having higher melting temperatures than the first solder balls; a semiconductor chip having a plurality of bonding pads connected to the second solder balls on a surface of the semiconductor chip; and an underfill resin disposed around the first and second solder balls.Type: GrantFiled: July 30, 2004Date of Patent: May 8, 2007Assignee: Kabushiki Kaisha ToshibaInventors: Akira Tomono, Soichi Homma