Abstract: A pin secured at one end of a link is inserted into an L-shaped groove of a ock lever pivoted to the upper surface of an upper guide rail and the other end of the link is connected to an actuator by way of a wire. The hook of the lock lever can be inserted into the hook hole of the flange of the lower guide rail. Rotating of the lock lever and thus rotation of the upper guide rail relative to the lower guide rail by an accidental external force to the lock lever can be prevented in the rotatable seat.

Abstract: A current amplifier circuit includes a first, second, third and fourth transistor, each having the same polarity. The first transistor is connected in series with the second transistor and both have the collector and base thereof electrically connected. The third and fourth transistors are connected in series and the fourth transistor has a resistor connected between the base and collector. The third transistor has its base connected to the collector of the first transistor. A bias current is applied to the collector of the first transistor and an input current to be amplified is applied to the base of the fourth transistor. An amplified output current is obtained across the collector to emitter of the third transistor. In a differential amplifier circuit, a fifth transistor having the same polarity is connected with its base connected to the collector of the fourth transistor through a resistor.

Abstract: A comparator which sets the comparison level depending on the number of transistors used easily ascertains the relative accuracy of the load resistors, is suitable for integration and improves the relative accuracy of input DC biases.

Abstract: A current amplifier circuit has a first transistor with a collector and a base which are electrically connected, a second transistor connected in series with the first transistor and having a collector and a base which are electrically connected. A third and fourth transistor are connected in series with the collector of the first transistor connected to a base of the third transistor and the collector of the second transistor connected to a base of the fourth transistor through a resistor having a resistance R. The first, second, third and fourth transistors have the same polarity. An amplified output signal current R.multidot.i/R.sub.E is obtained from a collector of the third transistor, wherein R.sub.E is the emitter resistance of the fourth transistor and i is the input signal applied to the base of the fourth transistor.

Abstract: A current mirror circuit of the present invention has the structure that the diode-connected second transistor is connected in series to the first transistor, the third and fourth transistors have bases which are respectively connected to the bases of the first and second transistors which are connected in series, and the collector of the fifth transitors, whose emitter and base are connected between the base and collector of the first transistor, is connected to the collector of the fourth transistor.

Abstract: A tuning apparatus of phase-locked loop type having a voltage controlled oscillator which is working as a local oscillator of a tuning circuit, a programmable divider supplied with the output signal from the voltage controlled oscillator, a reference frequency signal generating circuit, a phase comparator supplied with the output signal from the voltage controlled oscillator and the output signal from the reference frequency signal generating circuit, and supplying the output signal to the voltage controlled oscillator, the programmable divider, the reference frequency signal generating circuit and the phase comparator being formed in a single integrated circuit, and a control circuit formed separately from the integrated circuit for supplying a control data to the programmable divider in the single integrated circuit is disclosed, in which the integrated circuit further comprises a memory for memorizing the control data which is serially supplied from the control circuit and supplying the control data to the

Abstract: A signal converting circuit for converting a single-ended input signal to a pair of differential output signals includes a current source for generating a constant current; an input signal generating circuit for generating an input signal current; a first path including at least one diode connected to the current source and the input signal generating circuit for producing a first differential current as a function of the constant current and the input signal current; a second path including a series combination of a diode and the collector-emitter path of a transistor connected to the current source and the input signal generating circuit for producing a second differential current as a function of the constant current and the input signal current, the transistor being supplied with a current at its input; a differential amplifier output circuit having two transistors connected to the first and second paths for producing differential output signals in response to the first and second differential currents; a

Abstract: A signal converting circuit, which has particular application as a pedestal clamp circuit for a video signal, includes a differential amplifier having a pair of transistors which produce first and second differential currents at the respective collectors thereof; a first circuit supplied with the first differential current and including a diode and a first resistor having a first resistance value connected in series between the collector of one of the transistors of the differential amplifier and a reference potential; a second circuit supplied with the second differential current and including a second resistor having a second resistance value and a transistor having its collector emitter path connected in series with the second resistor between the collector of the other transistor of the differential amplifier and the reference potential; and an output circuit for producing an output current in response to the second differential current and including a current mirror transistor having its base-collector p

Abstract: A chrominance signal processing circuit for generating a gain-controlled chrominance signal carrier and a phase-controlled burst signal is provided with a first differential amplifier receiving a chrominance signal carrier and having a first constant current source, a second differential amplifier receiving an output signal of the first differential amplifier, a phase control circuit connected to the output of the second differential amplifier, the second differential amplifier receiving its bias current from a second constant current source during a chroma interval and from a third constant current source during a burst interval, the ratio of the currents of the first and second constant current sources being controlled for controlling the gain of the chrominance signal, and the output of the second differential amplifier being controlled at least during the burst interval, for controlling the phase of the burst signal.

Abstract: A circuit that is particularly adapted to convert a single-ended input signal to a pair of differential output signals. First and second series circuits are connected in parallel, the first series circuit being formed of first and second diodes and the second series circuit being formed of a third diode connected with the collector-emitter circuit of a transistor. The base electrode of the transistor is connected to the junction defined by the first and second diodes such that the base-emitter circuit thereof is in parallel arrangement with the second diode. A current source is connected to the parallel-connected series circuits so as to supply currents thereto. An input signal is supplied to the junction defined by the first and second diodes; the first and second outputs are coupled to this junction and to the collector electrode of the transistor, respectively, for providing differential output signal currents that are a function of the supplied signal.

Abstract: A burst signal level detecting circuit for an automatic color control (ACC) circuit of a television receiver includes a band pass amplifier through which an input chrominance signal is supplied to a first and a second phase comparator via a burst gate. A subtracted output of the first and second phase comparators is supplied to a voltage controlled oscillator (VCO) and, the output of the VCO is supplied to the first phase comparator and through a phase shifter to the second phase comparator. An added output of the first and second phase comparators is supplied to the band pass amplifier as an ACC signal for controlling the gain of the band pass amplifier.