Patents by Inventor Akira Yamamoto

Akira Yamamoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10622867
    Abstract: A drive device configured to drive a container transporting device for transporting a container is provided. The drive device includes a motor which generates power, a brake configured to brake a movement generated by the power of the motor, and a speed reducer which has an output shaft connected to a driven portion of the container transporting device, includes a lubricant enclosed therein, and is configured to decelerate the power of the motor and transmit the decelerated power to the output shaft, in which the speed reducer, the brake, and the motor are disposed in this order from above in a vertical direction, a first seal member configured to block the lubricant is provided between the speed reducer and the brake, and the brake includes an accommodation chamber which accommodates a leaked lubricant in a case where the lubricant enclosed in the speed reducer leaks past the first seal member.
    Type: Grant
    Filed: March 6, 2018
    Date of Patent: April 14, 2020
    Assignee: SUMITOMO HEAVY INDUSTRIES, LTD.
    Inventors: Mitsuhiro Tamura, Akira Yamamoto, Koji Moritani
  • Patent number: 10621083
    Abstract: A storage system selects from a plurality of physical areas constituting a physical address space as copy source physical areas, one or more non-additionally recordable physical areas each including a fragmented free area, and also selects a recordable physical area as a copy destination physical area. The storage system then writes one or more pieces of live data from the selected one or more copy source physical areas to the free area of the selected copy destination physical area on a per-strip or per-stripe basis, sequentially from the beginning of the free area. If the size of the write target data is such that it is not possible to write the write target data to the free area on a per-strip or per-stripe basis, then the storage system pads the write target data, and writes the padded write target data to the free area on a per-strip or per-stripe basis.
    Type: Grant
    Filed: May 12, 2015
    Date of Patent: April 14, 2020
    Assignee: Hitachi, Ltd.
    Inventors: Hiroshi Nakagoe, Akira Yamamoto, Yoshihiro Yoshii
  • Patent number: 10599351
    Abstract: One or more storage systems are connected to one or more storage boxes comprising multiple storage devices. Multiple storage areas provided by one or more storage boxes include an allocated area, which is a storage area that is allocated to a virtual volume, and an empty area, which is a storage area that is not allocated to any logical volume. Multiple owner rights corresponding to multiple storage areas are set in one or more storage systems. A storage system having an empty area owner right changes an empty area to the allocated area by allocating the empty area. In a case where a configuration change (a relative change in the number of storage boxes with respect to the number of storage systems) is performed, a first storage system that exists after the configuration change sets, in the first storage system, either more or fewer owner rights than the owner rights, which have been allocated to the first storage system before the configuration change.
    Type: Grant
    Filed: January 6, 2016
    Date of Patent: March 24, 2020
    Assignee: HITACHI, LTD.
    Inventors: Akira Yamamoto, Miho Imazaki
  • Patent number: 10592112
    Abstract: In some examples, a system may include a computing device in communication with at least one storage device. Initially, the computing device may execute a first type of storage software which stores a first volume in a first storage format on the storage device. The computing device may thereafter execute a second type of storage software which configures a second volume in a second storage format on the storage device. Subsequently, the data of the first volume is migrated to the second volume where the data is stored in the second storage format. In some cases, the second storage software may further define a virtual external device on the storage device and define a logical path from the virtual external device to the first volume. The logical path may be used to migrate the data from the first volume to the second volume.
    Type: Grant
    Filed: July 10, 2018
    Date of Patent: March 17, 2020
    Assignee: Hitachi, Ltd.
    Inventors: Yuki Sakashita, Akira Yamamoto
  • Publication number: 20200073584
    Abstract: When a second storage device in a second site receives an update notification regarding a first element updated according to a write request from a first host, from a first storage device in a first site, for a second element specified on the basis of the update notification, the second storage device manages data of the first element corresponding to the second element as latest data. The first storage device provides a first volume capable of including a plurality of first elements. The second storage device provides a second volume capable of including a plurality of second elements corresponding to the plurality of first elements. When the second storage device receives a read request from a second host, the second storage device determines whether or not data of the first element corresponding to a read source second element (second element specified from the read request) is the latest data.
    Type: Application
    Filed: August 3, 2017
    Publication date: March 5, 2020
    Inventors: Akiyoshi TSUCHIYA, Keiichi MATSUZAWA, Mitsuo HAYASAKA, Akira YAMAMOTO
  • Patent number: 10572171
    Abstract: A storage system according to an aspect of the present invention includes one or more storage devices for storing write data to which a write request from a host computer is directed, and a storage controller that provides one or more volumes to the host computer. Further, the storage system manages the time when a write request is last received from the host computer for each partition within the volume. Then, the storage controller performs a deduplication process upon detecting the partition not receiving a write request for a predetermined time or more from the time when the write request is last received.
    Type: Grant
    Filed: February 29, 2016
    Date of Patent: February 25, 2020
    Assignee: Hitachi, Ltd.
    Inventors: Nobumitsu Takaoka, Akira Yamamoto, Tomohiro Kawaguchi, Yasuo Watanabe, Yoshihiro Yoshii, Kazuki Matsugami
  • Publication number: 20200050388
    Abstract: In an information system including a plurality of computers each of which includes a processor and a storage device, where the information system inputs/outputs data to/from the storage device based on a request from a client program, when migrating data stored in a migration source information system to a storage device of a self information system, the processor transmits an instruction to cause a client program exerted on the migration source information system as the data migration source to generate an access means to access the data to be migrated of the migration source information system, and stores the data to be migrated in the storage device of the information system using the access means generated by the client program of the migration source information system.
    Type: Application
    Filed: March 11, 2019
    Publication date: February 13, 2020
    Inventors: Masanori TAKATA, Hideo SAITO, Masakuni AGETSUMA, Takahiro YAMAMOTO, Akira YAMAMOTO
  • Publication number: 20200046739
    Abstract: Provided herein is a topical composition and related methods for making and using the composition. In a first aspect, the topical composition comprises minocycline, a magnesium salt, and a sulfite compound in a non-aqueous solvent. In yet another aspect, the topical composition comprises a tetracycline-class drug, a source of magnesium, a monohydric aliphatic alcohol, and a polyol, wherein (i) the ratio between the monohydric aliphatic alcohol and the propylene glycol is in the range of 1:1 to 99:1 by weight and (ii) the tetracycline-class drug is dissolved in the topical composition.
    Type: Application
    Filed: July 17, 2019
    Publication date: February 13, 2020
    Inventors: Xin Chen, Maiko C. Hermsmeier, Diana Lac, Douglas W. Thomas, Noymi Yam, Akira Yamamoto
  • Publication number: 20200042213
    Abstract: A virtual storage system according to an aspect of the present invention includes multiple storage systems each including: a storage controller that accepts a read/write request for reading or writing from and to a logical volume; and multiple storage devices. The storage system defines a pool that manages the storage device capable of allocating any of storage areas to the logical volume, and manages the capacity (pool capacity) of the storage areas belonging to the pool, and the capacity (pool available capacity) of unused storage areas in the pool. Furthermore, the storage system calculates the total value of the pool available capacities of the storage systems included in the virtual storage system, and provides the server with the total value as the pool available capacity of the virtual storage system.
    Type: Application
    Filed: October 10, 2019
    Publication date: February 6, 2020
    Inventors: Akira YAMAMOTO, Hiroaki AKUTSU, Tomohiro KAWAGUCHI
  • Patent number: 10550153
    Abstract: To provide a peptide that selectively activates type 2 neuromedin U receptor and is chemically stable under physiological conditions. A peptide represented by Formula (1) described in the specification.
    Type: Grant
    Filed: January 19, 2018
    Date of Patent: February 4, 2020
    Assignees: TOKYO UNIVERSITY OF PHARMACY & LIFE SCIENCES, NATIONAL CEREBRAL AND CARDIOVASCULAR CENTER, KYOTO PHARMACEUTICAL UNIVERSITY
    Inventors: Yoshio Hayashi, Kentaro Takayama, Mikiya Miyazato, Kenji Kangawa, Kenji Mori, Akira Yamamoto, Toshiyasu Sakane
  • Publication number: 20200025277
    Abstract: An eccentrically oscillating type reduction gear includes an internal gear, an external gear which meshes with the internal gear, and an eccentric body which oscillates the external gear. The external gear is formed of a resin, and the internal gear has an internal gear main body which is formed of a resin, and an outer pin which is rotatably disposed in a pin groove provided in the internal gear main body and is formed of a material having a thermal conductivity higher than that of the resin constituting the internal gear main body.
    Type: Application
    Filed: July 12, 2019
    Publication date: January 23, 2020
    Inventors: Mitsuhiro Tamura, Akira Yamamoto
  • Publication number: 20200019318
    Abstract: In some examples, a system may include a computing device in communication with at least one storage device. Initially, the computing device may execute a first type of storage software which stores a first volume in a first storage format on the storage device. The computing device may thereafter execute a second type of storage software which configures a second volume in a second storage format on the storage device. Subsequently, the data of the first volume is migrated to the second volume where the data is stored in the second storage format. In some cases, the second storage software may further define a virtual external device on the storage device and define a logical path from the virtual external device to the first volume. The logical path may be used to migrate the data from the first volume to the second volume.
    Type: Application
    Filed: July 10, 2018
    Publication date: January 16, 2020
    Inventors: Yuki SAKASHITA, Akira YAMAMOTO
  • Publication number: 20200013356
    Abstract: A display device includes a plurality of pixels arranged in a matrix. Overlapping areas between gate electrodes and drain electrodes of switching elements connected to a plurality of selected pixel electrodes are individually set to equalize or substantially equalize retention voltages Vd(+) (Vd(?)) of the selected pixel electrodes when a specific voltage of a first polarity is applied to the selected pixel electrodes. The source application section is controlled to apply to the source lines source signals Vsc each of which is corrected by superposing a correction voltage preset for each source line on the source signal Vs(?) (Vs(+)) in application of a voltage of a second polarity to the selected pixel electrodes.
    Type: Application
    Filed: July 2, 2019
    Publication date: January 9, 2020
    Inventor: AKIRA YAMAMOTO
  • Publication number: 20200012181
    Abstract: The present invention provides a transparent screen which is excellent in transparency and in which a reflection part contour at the time of not displaying an image is unlikely to be recognized. An optical sheet of the present invention includes a substrate; and a cholesteric liquid crystal layer on the substrate, in which the entire cholesteric liquid crystal layer is surrounded by an imaginary contour line, the cholesteric liquid crystal layer has a uniform region and a modulation region that is located between the uniform region and at least a part of the imaginary contour line, a shortest distance between the imaginary contour line and the uniform region is 10 mm or longer, and a reflectance of the modulation region monotonously decreases from the uniform region side toward the imaginary contour line side.
    Type: Application
    Filed: September 16, 2019
    Publication date: January 9, 2020
    Applicant: FUJIFILM Corporation
    Inventors: Akira Yamamoto, Hideki Kaneiwa, Yujiro Yanai, Michio Nagai
  • Patent number: 10518548
    Abstract: A liquid ejection head has a plurality of ejection modules having a recording element substrate equipped with a plurality of ejection orifices for ejecting a liquid, a plurality of first flow path members that supports at least one of the ejection modules and a second flow path member provided in common with the first flow path members and supporting the first flow path members. The first flow path members and the second flow path member are equipped with a flow path for supplying a plurality of recording element substrates with a liquid. The first flow path members are joined with the second flow path member via an adhesive layer without being brought into direct contact with the second flow path member.
    Type: Grant
    Filed: June 26, 2018
    Date of Patent: December 31, 2019
    Assignee: Canon Kabushiki Kaisha
    Inventors: Kazuhiro Yamada, Shuzo Iwanaga, Seiichiro Karita, Shingo Okushima, Zentaro Tamenaga, Noriyasu Nagai, Tatsurou Mori, Akio Saito, Akira Yamamoto, Asuka Horie, Masao Furukawa, Takatsuna Aoki
  • Publication number: 20190390735
    Abstract: A reduction gear includes an external gear, an internal gear which meshes with the external gear, a first member which synchronizes with a rotation of the external gear, a second member which synchronizes with a rotation of the internal gear, and a main bearing which is disposed between the first member and the second member, in which one of the first member and the second member is connected to a driven member and the other is fixed to an external member, and the first member, the second member, and the main bearing are formed of a material having a larger Young's modulus and larger specific gravity than those of a material constituting the external gear and the internal gear.
    Type: Application
    Filed: June 6, 2019
    Publication date: December 26, 2019
    Inventors: Mitsuhiro Tamura, Akira Yamamoto
  • Patent number: 10515071
    Abstract: A blockwise-erase nonvolatile storage device for storing a database includes extended logical-to-physical conversion information that associates, for each of a plurality of logical addresses, a timestamp, a physical address, and a reference counter with each other. Each reference counter indicates the number of referring sources to refer to data associated with both the logical address and the timestamp that are associated with the reference counter. On the basis of the conversion information, it is determined whether a target logical address has associated therewith a timestamp older than the latest timestamp and whether the reference counter associated with both the target logical address and the older timestamp indicates that there is no referring source. If so, then the blockwise-erase nonvolatile storage device manages, as an erasable physical area (invalid physical area), the physical area at the physical address associated with both the target logical address and the older timestamp.
    Type: Grant
    Filed: April 8, 2015
    Date of Patent: December 24, 2019
    Assignee: Hitachi, Ltd.
    Inventors: Kazutomo Ushijima, Akira Yamamoto
  • Patent number: 10503424
    Abstract: A storage system is provided that has a plurality of flash packages and a storage controller that controls read/write processing between a host and the flash packages. When data identical to data written in a second address of a second flash package of the plurality of flash packages is written to a first address of a first flash package of the plurality of flash packages, the storage system may store the second address in the first package in association with the first address, and perform deduplication. When the first flash package stores the second address in association with the first address and a read request for the first address is received from the storage controller, the first flash package may return the second address to the storage controller. In response to receiving the second address, the storage controller may acquire target read data from the second flash package.
    Type: Grant
    Filed: September 21, 2016
    Date of Patent: December 10, 2019
    Assignee: HITACHI, LTD.
    Inventors: Akira Yamamoto, Atsushi Kawamura
  • Patent number: 10496294
    Abstract: An instruction to associate a second logical volume with a second virtual storage, which is a migration destination of a first virtual storage that provides a first logical volume, is transmitted. The first virtual storage is a virtual storage to which a virtual resource provided by a virtual managing unit is allocated. A copy instruction, which is an instruction to copy data from either one of the first logical volume and a copy source logical volume of the first logical volume to the second logical volume is transmitted. When copy completion, which is completion of the data copy to the second logical volume, is detected, an erasing instruction, which is an instruction to erase the first virtual storage, is transmitted to the virtual managing unit.
    Type: Grant
    Filed: February 24, 2016
    Date of Patent: December 3, 2019
    Assignee: Hitachi, Ltd.
    Inventors: Miho Imazaki, Masakuni Agetsuma, Akira Yamamoto, Akira Deguchi
  • Publication number: 20190359652
    Abstract: To provide a peptide that selectively activates type 2 neuromedin U receptor and is chemically stable under physiological conditions. A peptide represented by Formula (1) described in the specification.
    Type: Application
    Filed: January 19, 2018
    Publication date: November 28, 2019
    Inventors: Yoshio HAYASHI, Kentaro TAKAYAMA, Mikiya MIYAZATO, Kenji KANGAWA, Kenji MORI, Akira YAMAMOTO, Toshiyasu SAKANE