Patents by Inventor Akira Yokomizo

Akira Yokomizo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Digital wave shaping circuit, frequency multiplying circuit, and external synchronizing method, and external synchronizing circuit
    Patent number: 6130566
    Abstract: The invention relates to a wave form shaping circuit, which outputs signals after shaping the input signal to a duty 50% wave form regardless of whether or not input signals are of duty 50%, wherein a duty determination circuit is provided, which determines and instructs the timing position of duty 50% of clock signals to be outputted, upon receiving a timing signal prepared by a timing generation circuit 2.
    Type: Grant
    Filed: October 27, 1997
    Date of Patent: October 10, 2000
    Inventor: Akira Yokomizo
  • Digital wave shaping circuit, frequency multiplying circuit, and external synchronizing method, and external synchronizing circuit
    Patent number: 6104774
    Abstract: The invention relates to a wave form shaping circuit, etc. which outputs signals after shaping the input signal to a duty 50% wave form regardless of whether or not input signals are of duty 50%, wherein a duty determination circuit is provided, which determines and instructs the timing position of duty 50% of clock signals to be outputted, upon receiving a timing signal prepared by a timing generation circuit 2.
    Type: Grant
    Filed: April 21, 1999
    Date of Patent: August 15, 2000
    Inventor: Akira Yokomizo
  • Digital wave shaping circuit, frequency multiplying circuit, and external synchronizing method, and external synchronizing circuit
    Patent number: 6097224
    Abstract: The invention relates to a wave form shaping circuit, etc. which outputs signals after shaping the input signal to a duty 50% wave form regardless of whether or not input signals are of duty 50%, wherein a duty determination circuit is provided, which determines and instructs the timing position of duty 50% of clock signals to be outputted, upon receiving a timing signal prepared by a timing generation circuit 2.
    Type: Grant
    Filed: April 21, 1999
    Date of Patent: August 1, 2000
    Inventor: Akira Yokomizo