Patents by Inventor Akira Yoshigai

Akira Yoshigai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5777387
    Abstract: Copper foil wiring is applied to base film and the wiring is in turn covered by a cover resist. The electrodes of a semiconductor IC chip is connected to the inner leads of the copper foil wiring and the semiconductor chip is then encapsulated by encapsulation resin. Solder balls are supplied to lands through openings in the cover resist, and bumps are formed. The four sides of the film are then folded to form folded portions. These folded portions increase the strength of the edges of the film, thereby reducing warping and waviness and allowing simultaneous mounting of other devices such as QFP to the substrate. The angle of folding with respect to the film surface is preferably 20.degree. or greater and less than 90.degree., and still greater strength can be obtained by two-stage folding of the sides.
    Type: Grant
    Filed: November 21, 1997
    Date of Patent: July 7, 1998
    Assignee: NEC Corporation
    Inventors: Chikara Yamashita, Akira Yoshigai
  • Patent number: 5606199
    Abstract: The resin-molded type semiconductor device disclosed has a semiconductor chip mounted on an island of a lead frame. The device includes a plurality of first metal foil leads on a tape carrier, which connect electrode pads respectively to inner leads of the lead frame. Among the first metal foil leads, there are a plurality of second metal foil leads which constitute ground wiring, and these second metal foil leads are connected in parallel to the island. For these connections, each of the second metal foil leads has one branch lead, or two branch leads respectively on the inner lead side and on the outer lead side. By forming the ground wiring in this way, it is possible to reduce the parasitic inductance and resistance of the ground circuit.
    Type: Grant
    Filed: October 5, 1995
    Date of Patent: February 25, 1997
    Assignee: NEC Corporation
    Inventor: Akira Yoshigai
  • Patent number: 5338973
    Abstract: An opening is formed at the central part of a substrate, and a recessed part for holding a film carrier type IC is formed in the periphery of the opening. Fixing hooks are provided in the recessed part that are mutually opposed with the opening in between. In particular, the projections in the upper part of the fixing hooks are tapered to facilitate the insertion of the fixing hooks to the sprocket holes.
    Type: Grant
    Filed: November 1, 1993
    Date of Patent: August 16, 1994
    Assignee: NEC Corporation
    Inventor: Akira Yoshigai