Abstract: According to one embodiment, a semiconductor memory device includes: a stacked body having a stacked structure in which a plurality of conductive layers and a plurality of insulating layers are alternately stacked one by one, the stacked body including a memory region and a dummy region arranged in a first direction intersecting a stacking direction of the plurality of conductive layers, the dummy region including a first stepped portion in which at least a part of the plurality of conductive layers on an upper layer side is processed in a stepped shape and terminates at an end portion opposite to the memory region in the first direction; and first and second plate-like portions extending in the stacking direction and the first direction in the stacked body at positions in the memory region away from each other in a second direction intersecting the stacking direction and the first direction, the first and second plate-like portions being directly or indirectly connected to each other and terminating in the d

Abstract: Semiconductor memory device includes: a first and second member each extending in a first direction in a boundary part between a first and second block region and arranged in the first direction; a support pillar arranged between the first and second member at the boundary part; conductive layers separated from one another and arranged in a third direction and split by the first and second member, and the support pillar into a first and second portion; and a memory pillar penetrating through the conductive layers. The support pillar includes a lower and upper pillar. A side face of the lower pillar and an extension of a side face of the upper pillar are displaced from each other in a plane based on a second and the third direction.

Abstract: A storage device including a transistor portion including a transistor, a plurality of interlayer insulating films provided above the transistor portion, a plurality of first conductive layers provided respectively between the plurality of interlayer insulating films, and a second conductive layer extending through the plurality of interlayer insulating films and the plurality of first conductive layers, the second conductive layer having one end electrically connected to the transistor portion, and a part that extends beyond a portion of the transistor portion.

Abstract: A storage device includes a substrate; a plurality of insulating layers extending in a first direction; a plurality of first conductive layers extending in the first direction, and stacked alternately with the plurality of insulating layers along a second direction that intersects the first direction and is perpendicular to the substrate; a second conductive layer extending in the second direction; a recording layer provided between the second conductive layer and the plurality of first conductive layers; a first transistor electrically connected to the second conductive layer; a second transistor provided adjacent to the first transistor in a third direction that intersects the first direction and the second direction and is parallel to the substrate; and a first insulator provided on the second transistor.

Abstract: A storage device including a transistor portion including a transistor, a plurality of interlayer insulating films provided above the transistor portion, a plurality of first conductive layers provided respectively between the plurality of interlayer insulating films, and a second conductive layer extending through the plurality of interlayer insulating films and the plurality of first conductive layers, the second conductive layer having one end electrically connected to the transistor portion, and a part that extends beyond a portion of the transistor portion.

Abstract: A semiconductor device includes a semiconductor pillar and a control electrode. The semiconductor pillar extends in a first direction, and includes a first region, a second region and an intermediate region provided along the first direction. The intermediate region is positioned between the first region and the second region. The control electrode is disposed at a position so that the control electrode faces the intermediate region via an insulating film. The semiconductor pillar is provided so that a minimum width of the intermediate region in a second direction perpendicular to the first direction is narrower than a first width of the first region in the second direction and a second width of the second region in the second direction.

Abstract: A semiconductor device includes a semiconductor substrate, an interlayer insulating film on the semiconductor substrate and having a first hole extending therethrough, and a contact portion in the first hole of the interlayer insulating film. The contact portion includes a first silicon film along an inner surface of the first hole of the interlayer insulating film.

Abstract: A semiconductor device according to an embodiment includes a semiconductor substrate, an interlayer insulating film that is formed on the semiconductor substrate and is provided with a first hole, and a contact portion that is formed in the first hole of the interlayer insulating film. The contact portion includes a first silicon film along an inner surface of the first hole of the interlayer insulating film.

Abstract: An evaluation element includes a plurality of first wirings extending in a first direction, connection conductors, each connection conductor electrically contact a single one of the first wirings, and a plurality of second wirings extending in a second direction that crosses the first direction and electrically contacts the connection conductors contacting the first wirings. The connection conductors are provided in at least two separated positions on the same first wiring. The plurality of second wiring are positioned such that a series electrical connection is established, through the connection conductors and the first wirings, between one second wiring and another second wiring.

Abstract: A nonvolatile semiconductor storage device includes a substrate; an isolation film extending in a first direction and dividing the substrate into element regions; a cell string including memory cells in the element regions; a cell unit including the cell string and a select transistor on first directional ends of the cell string; diffusion layers formed in a portion of the element region first directionally beside the select gate electrode, the diffusion layers being adjacent to one another in a second direction intersecting with the first direction; and contacts extending through an interlayer insulating film and contacting the diffusion layers. An upper surface of the isolation film located between the diffusion layers is lower than an upper surface of the substrate. A laminate of silicon oxide film and a silicon nitride film are located above the upper surface of the isolation film and below the upper surface of the substrate.

Abstract: A semiconductor device includes memory cell units, each including memory cell transistors, a first transistor at a first end of the memory cell transistors, and a second transistor at a second end of the memory cell transistors. The memory cell units are arranged so that adjacent memory cell units have first transistors thereof facing each other or second transistors thereof facing each other, and so that a distance between the first transistors of the adjacent memory cell units is larger than a distance between the second transistors of the adjacent memory cell units. The semiconductor device further includes a first silicon nitride layer covering a first diffusion layer of the first transistors, a second silicon nitride layer covering a second diffusion layer of the second transistors. A thickness of the second silicon nitride layer is smaller than a thickness of the first silicon nitride layer.

Abstract: A nonvolatile semiconductor storage device includes a substrate; an isolation film extending in a first direction and dividing the substrate into element regions; a cell string including memory cells in the element regions; a cell unit including the cell string and a select transistor on first directional ends of the cell string; diffusion layers formed in a portion of the element region first directionally beside the select gate electrode, the diffusion layers being adjacent to one another in a second direction intersecting with the first direction; and contacts extending through an interlayer insulating film and contacting the diffusion layers. An upper surface of the isolation film located between the diffusion layers is lower than an upper surface of the substrate. A laminate of silicon oxide film and a silicon nitride film are located above the upper surface of the isolation film and below the upper surface of the substrate.

Abstract: A semiconductor storage device includes an interlayer insulating film provided between select gate electrodes, a first fill material extending along upper portions of memory cell gate electrodes so as to cover air gaps residing between the memory cell gate electrodes, the first fill material extending along sidewalls of the select gate electrodes and sidewalls of the interlayer insulating film so as to define a recess above the first fill material extending along the sidewalls of the select gate electrodes and the sidewalls of the interlayer insulating film, a second fill material filling the recess above the first fill material, and a plurality of contacts formed through the interlayer insulating film, the contacts physically contacting each of device areas formed in a semiconductor substrate.

Abstract: A semiconductor storage device includes an interlayer insulating film provided between select gate electrodes, a first fill material extending along upper portions of memory cell gate electrodes so as to cover air gaps residing between the memory cell gate electrodes, the first fill material extending along sidewalls of the select gate electrodes and sidewalls of the interlayer insulating film so as to define a recess above the first fill material extending along the sidewalls of the select gate electrodes and the sidewalls of the interlayer insulating film, a second fill material filling the recess above the first fill material, and a plurality of contacts formed through the interlayer insulating film, the contacts physically contacting each of device areas formed in a semiconductor substrate.

Abstract: According to one embodiment, a semiconductor storage device includes: a plurality of word lines that are formed at predetermined intervals in a first direction on the element region; a select gate transistor that is arranged in each of both sides of the word lines and has a width in the first direction wider than the word line; a first air gap that is positioned between the word lines; and a second air gap that is formed on a side wall portion opposite to a side of the word line of the select gate transistor. Further, according to one embodiment, the semiconductor storage device is provided in which an oxide film is formed on a surface of a substrate between the select gate transistors that are adjacent to each other, and a cross-sectional surface in a direction perpendicular to the first direction under the oxide film has a convex shape.