Patents by Inventor Akiro Uragami

Akiro Uragami has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Bicmos gate array
    Patent number: 4879480
    Abstract: In an input level converter for TTL - CMOS level conversion (or other conversion to CMOS) for an internal logic block operating with CMOS levels, an output transistor for executing the charge or discharge of the output capacitance thereof is formed of a bipolar transistor. Thus, the propagation delay times and their capacitance-dependencies of the input level converter can be lessened. Similarly, in an output level converter for CMOS - TTL level conversion (or other conversion from CMOS) for the internal logic block operating with the CMOS levels, an output transistor for executing the charge or discharge of the output load capacitance thereof is formed of a bipolar transistor. Thus, the propagation delay times and their capacitance-dependencies of the output level converter can also be lessened.
    Type: Grant
    Filed: September 2, 1988
    Date of Patent: November 7, 1989
    Assignee: Hitachi, Ltd.
    Inventors: Yukio Suzuki, Ikuro Masuda, Masahiro Iwamura, Shinji Kadono, Akiro Uragami, Masayoshi Yoshimura, Toshiaki Matsubara