Abstract: A semiconductor device includes a field effect transistor and a strain generating layer to apply a stress to a channel region of the field effect transistor. The strain generating layer contains at least one of oxygen and nitrogen of 1.0×1018 cm?3 to 5.0×1019 cm?3, or alternatively, the strain generating layer contains self-interstitial atoms and/or vacancies of 1.0×1018 cm?3 to 5.0×1019 cm?3. In the latter case, at least a portion of the self-interstitial atoms and/or the vacancies exist as a cluster.

Abstract: A semiconductor device includes a field effect transistor and a strain generating layer to apply a stress to a channel region of the field effect transistor. The strain generating layer contains at least one of oxygen and nitrogen of 1.0×1018 cm?3 to 5.0×1019 cm?3, or alternatively, the strain generating layer contains self-interstitial atoms and/or vacancies of 1.0×1018 cm?3 to 5.0×1019 cm?3. In the latter case, at least a portion of the self-interstitial atoms and/or the vacancies exist as a cluster.

Abstract: A semiconductor device includes a field effect transistor and a strain generating layer to apply a stress to a channel region of the field effect transistor. The strain generating layer contains at least one of oxygen and nitrogen of 1.0×1018 cm?3 to 5.0×1019 cm?3, or alternatively, the strain generating layer contains self-interstitial atoms and/or vacancies of 1.0×1018 cm?3 to 5.0×1019 cm?3. In the latter case, at least a portion of the self-interstitial atoms and/or the vacancies exist as a cluster.

Abstract: A method for manufacturing a semiconductor device, including the steps of: forming a shielding film 38 on a first insulating film 37; sequentially forming a second insulating film 39 and an amorphous semiconductor film 40 on the shielding film 38; melting the amorphous semiconductor film 40 at least in portions to be channels of thin-film transistors by irradiating an energy beam onto the amorphous semiconductor film 40, and converting the amorphous semiconductor film 40 into a polycrystalline semiconductor film 41; sequentially forming a gate insulating film 43a and a gate electrode 44a on the polycrystalline semiconductor film 41 on the channels; and forming source and drain regions 41a in the polycrystalline semiconductor film 41 on sides of the gate electrode 44a, and forming a TFT 60 by use of the source and drain regions 41a, the gate insulating film 43a, and the gate electrode 44a.

Abstract: An Mo film (6) is formed on a SiO2 film (5) by particularly using the film thickness and the deposition temperature (ambient temperature in a sputtering chamber) as the primary parameters and adjusting the film thickness to be within the range from 100 nm to 500 nm (more preferably 100 nm to 300 nm) and the deposition temperature to be within the range from 25° C. to 300° C., so as to control residual stress to have a predetermined value of 300 MPa or greater and to be oriented to increase the in-plane lattice constant. There can be thus provided a reliable CMOSTFT in which desired strain is easily and reliably imparted to polysilicon thin films (4a and 4b) to improve the mobility therein without adding an extra step of imparting the strain to the silicon thin film.

Abstract: A polycrystal thin film forming method comprising the step of forming a semiconductor thin film on a substrate 14, and the step of flowing a heated gas to the semiconductor thin film while an energy beam 38 is being applied to the semiconductor thin film at a region to which the gas is being applied to thereby melt the semiconductor film, and crystallizing the semiconductor thin film in its solidification. The energy beam is applied while the high-temperature gas is being flowed, whereby the melted semiconductor thin film can have low solidification rate, whereby the polycrystal thin film can have large crystal grain diameters and can have good quality of little defects in crystal grains and little twins.

Abstract: A polycrystal thin film forming method comprising the step of forming a semiconductor thin film on a substrate 14, and the step of flowing a heated gas to the semiconductor thin film while an energy beam 38 is being applied to the semiconductor thin film at a region to which the gas is being applied to thereby melt the semiconductor film, and crystallizing the semiconductor thin film in its solidification. The energy beam is applied while the high-temperature gas is being flowed, whereby the melted semiconductor thin film can have low solidification rate, whereby the polycrystal thin film can have large crystal grain diameters and can have good quality of little defects in crystal grains and little twins.

Abstract: A semiconductor device is disclosed. The semiconductor device includes a semiconductor layer having a channel region, a strain generating layer to cause strain in the channel region by applying a stress to the channel region, a gate insulating film formed on the channel region, and a gate electrode formed on the gate insulating film. An impurity region containing nitrogen, oxygen, or boron as impurities is provided in the semiconductor layer or the strain generating layer.

Abstract: A semiconductor device includes a field effect transistor and a strain generating layer to apply a stress to a channel region of the field effect transistor. The strain generating layer contains at least one of oxygen and nitrogen of 1.0×1018 cm?3 to 5.0×1019 cm?3, or alternatively, the strain generating layer contains self-interstitial atoms and/or vacancies of 1.0×1018 cm?3 to 5.0×1019 cm?3. In the latter case, at least a portion of the self-interstitial atoms and/or the vacancies exist as a cluster.

Abstract: A method for manufacturing a semiconductor device, including the steps of: forming a shielding film 38 on a first insulating film 37; sequentially forming a second insulating film 39 and an amorphous semiconductor film 40 on the shielding film 38; melting the amorphous semiconductor film 40 at least in portions to be channels of thin-film transistors by irradiating an energy beam onto the amorphous semiconductor film 40, and converting the amorphous semiconductor film 40 into a polycrystalline semiconductor film 41; sequentially forming a gate insulating film 43a and a gate electrode 44a on the polycrystalline semiconductor film 41 on the channels; and forming source and drain regions 41a in the polycrystalline semiconductor film 41 on sides of the gate electrode 44a, and forming a TFT 60 by use of the source and drain regions 41a, the gate insulating film 43a, and the gate electrode 44a.

Abstract: A polycrystal thin film forming method comprising the step of forming a semiconductor thin film on a substrate 14, and the step of flowing a heated gas to the semiconductor thin film while an energy beam 38 is being applied to the semiconductor thin film at a region to which the gas is being applied to thereby melt the semiconductor film, and crystallizing the semiconductor thin film in its solidification. The energy beam is applied while the high-temperature gas is being flowed, whereby the melted semiconductor thin film can have low solidification rate, whereby the polycrystal thin film can have large crystal grain diameters and can have good quality of little defects in crystal grains and little twins.

Abstract: A polycrystal thin film forming method comprising the step of forming a semiconductor thin film on a substrate 14, and the step of flowing a heated gas to the semiconductor thin film while an energy beam 38 is being applied to the semiconductor thin film at a region to which the gas is being applied to thereby melt the semiconductor film, and crystallizing the semiconductor thin film in its solidification. The energy beam is applied while the high-temperature gas is being flowed, whereby the melted semiconductor thin film can have low solidification rate, whereby the polycrystal thin film can have large crystal grain diameters and can have good quality of little defects in crystal grains and little twins.

Abstract: A TFT capable of showing a large gm (large ON-current) and having characteristics comparable to those of Si-MOSFET despite of its relatively simple configuration was fabricated by the steps of coating, for example, a positive photo-resist on an Mo film; subjecting the photo-resist to back light exposure from the glass-substrate side under masking with a bottom gate electrode, to thereby form a resist pattern having the same geometry and being aligned with the bottom gate electrode because exposure light is intercepted by the bottom gate electrode but can travel through the Mo film; and etching the Mo film under masking by the resist pattern to thereby form a top gate electrode in conformity with the geometry of the resist pattern in a self-aligned manner.

Abstract: An a-Si film is patterned into a linear shape (ribbon shape) or island shape on a glass substrate. The upper surface of the a-Si film or the lower surface of the glass substrate is irradiated and scanned with an energy beam output continuously along the time axis from a CW laser in a direction indicated by an arrow, thereby crystallizing the a-Si film. This implements a TFT in which the transistor characteristics of the TFT are made uniform at high level, and the mobility is high particularly in a peripheral circuit region to enable high-speed driving in applications to a system-on glass and the like.

Abstract: A semiconductor manufacturing apparatus emits an energy beam for crystallizing a semiconductor film formed on a substrate. The apparatus can output a plurality of energy beams continuously in relation to time and move the energy beams to scan a target to be irradiated. The output instability of the energy beam is smaller than ±1%/h. The noise (optical noise) indicating the instability of the energy beam can be not more than 0.1 rms %.

Abstract: A TFT capable of showing a large gm (large ON-current) and having characteristics comparable to those of Si-MOSFET despite of its relatively simple configuration was fabricated by the steps of coating, for example, a positive photo-resist on an Mo film; subjecting the photo-resist to back light exposure from the glass-substrate side under masking with a bottom gate electrode, to thereby form a resist pattern having the same geometry and being aligned with the bottom gate electrode because exposure light is intercepted by the bottom gate electrode but can travel through the Mo film; and etching the Mo film under masking by the resist pattern to thereby form a top gate electrode in conformity with the geometry of the resist pattern in a self-aligned manner.

Abstract: An operating semiconductor layer is formed in such a manner that amorphous silicon layer is formed to be shaped so that it has a wide region and a narrow region and the narrow region is connected to the wide region at a position asymmetric to the wide region, and the amorphous silicon layer is crystallized by scanning a CW laser beam from the wide region toward the narrow region in a state that a polycrystalline silicon layer as a heat-retaining layer encloses the narrow region from a side face through the silicon oxide layer.

Abstract: An a-Si film is patterned into a linear shape (ribbon shape) or island shape on a glass substrate. The upper surface of the a-Si film or the lower surface of the glass substrate is irradiated and scanned with an energy beam output continuously along the time axis from a CW laser in a direction indicated by an arrow, thereby crystallizing the a-Si film. This implements a TFT in which the transistor characteristics of the TFT are made uniform at high level, and the mobility is high particularly in a peripheral circuit region to enable high-speed driving in applications to a system-on glass and the like.

Abstract: There is provided the step of forming a polysilicon film by scanning a laser irradiation region while irradiating a continuous wave laser onto an amorphous silicon film formed into an island or ribbon-like shape on a substrate. If a width of a rectangle in which the amorphous silicon film is inscribed is 30 &mgr;m or less, any one condition of (1) a top end shape of a pattern is a convex shape, (2) a top end shape is a concave shape and consists of straight lines and has three corner portions at a top end side, and both angles of the corner portions on both sides of the top end shape are set to 45 degree or more, (3) a top end shape is a concave shape and consists of curved lines, and (4) a width of a top end portion is 25 &mgr;m or less, is satisfied.

Abstract: A first layer made of polysilicon is formed on the surface of an underlying substrate. The surface of the first layer is exposed to an environment which etches silicon oxide. If the surface of the first layer is covered with a silicon oxide film, the silicon oxide film is removed. An energy is supplied to the first layer, the energy allowing silicon crystal to re-grow. Solid phase growth of silicon occurs in the first layer to planarize the surface thereof. A polysilicon film having small root mean square of roughness can be formed.