Patents by Inventor Akito MORI
Akito MORI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240121530Abstract: A light detector is configured such that a light receiving portion having APDs and a peripheral portion are provided on a first principal surface of a p-type semiconductor substrate, and further includes a back electrode provided on a second principal surface of the semiconductor substrate and a p-type first separation portion provided between the light receiving portion and the peripheral portion. The APD has, on a first principal surface side, an n-type region and a p-epitaxial layer contacting the n-type region in a Z-direction. The peripheral portion has an n-type MISFET provided at a p-well and an n-well provided to surround entire side and bottom portions of the p-well.Type: ApplicationFiled: December 15, 2023Publication date: April 11, 2024Inventors: Tatsuya KABE, Hideyuki ARAI, Hisashi AIKAWA, Yuki SUGIURA, Akito INOUE, Mitsuyoshi MORI, Kentaro NAKANISHI, Yusuke SAKATA
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Publication number: 20240105391Abstract: A multilayer ceramic capacitor includes a multilayer body including dielectric layers and internal electrode layers alternately laminated therein, base electrode layers respectively provided on both end surfaces of the multilayer body in a length direction intersecting a lamination direction, and each connected to the internal electrode layers and each including glass and copper, and plated layers respectively provided on an outer side of the base electrode layers. A protective layer including sulfur is provided between the glass included in the base electrode layers and the plated layers.Type: ApplicationFiled: November 30, 2023Publication date: March 28, 2024Inventors: Keita KITAHARA, Yuta SAITO, Noriyuki OOKAWA, Riyousuke AKAZAWA, Takefumi TAKAHASHI, Masahiro WAKASHIMA, Yuta KUROSU, Akito MORI
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Publication number: 20240029958Abstract: A multilayer ceramic capacitor includes a multilayer body including an inner layer portion including dielectric layers and internal electrode layers alternately laminated therein, two outer layer portions respectively provided on both sides of the inner layer portion in a lamination direction, and two side gap portions respectively provided on both side surfaces of the inner layer portion and the outer layer portions, in a width direction intersecting the lamination direction, and external electrodes respectively provided on both end surfaces of the multilayer body in a length direction intersecting the lamination direction and the width direction, and each connected to the internal electrode layers, wherein nickel and magnesium are segregated between the side gap portions and the outer layer portions.Type: ApplicationFiled: October 2, 2023Publication date: January 25, 2024Inventors: Keita KITAHARA, Yuta SAITO, Noriyuki OOKAWA, Riyousuke AKAZAWA, Takefumi TAKAHASHI, Masahiro WAKASHIMA, Yuta KUROSU, Akito MORI
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Patent number: 11862402Abstract: A multilayer ceramic capacitor includes a multilayer body including dielectric layers and internal electrode layers alternately laminated therein, base electrode layers respectively provided on both end surfaces of the multilayer body in a length direction intersecting a lamination direction, and each connected to the internal electrode layers and each including glass and copper, and plated layers respectively provided on an outer side of the base electrode layers. A protective layer including sulfur is provided between the glass included in the base electrode layers and the plated layers.Type: GrantFiled: September 28, 2021Date of Patent: January 2, 2024Assignee: MURATA MANUFACTURING CO., LTD.Inventors: Keita Kitahara, Yuta Saito, Noriyuki Ookawa, Riyousuke Akazawa, Takefumi Takahashi, Masahiro Wakashima, Yuta Kurosu, Akito Mori
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Patent number: 11837414Abstract: A multilayer ceramic capacitor package accommodating multilayer ceramic capacitors includes a carrier tape that is elongated and includes recess pockets at equal or substantially equal intervals in a longitudinal direction, a cover tape that is elongated and attached to the carrier tape to cover an opening of each of the pockets, and the multilayer ceramic capacitors respectively accommodated in the pockets. In the multilayer ceramic capacitor package, in adjacent multilayer ceramic capacitors, a difference in densities of surfaces on an opening side of the pockets is about 0% or more and about 4% or less.Type: GrantFiled: October 7, 2021Date of Patent: December 5, 2023Assignee: MURATA MANUFACTURING CO., LTD.Inventors: Masahiro Wakashima, Yuta Saito, Akito Mori
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Publication number: 20230360856Abstract: A multilayer ceramic capacitor includes a multilayer body including dielectric layers and internal electrode layers alternately laminated therein, and external electrode layers respectively provided on both end surfaces of the multilayer body in a length direction intersecting a lamination direction, and each connected to the internal electrode layers, the external electrode layers each further including a base electrode layer including a first region, a second region, and a third region divided therein, in order from the multilayer body. The first region includes a metal included in the internal electrode layers in a higher amount than the second region and the third region, the second region includes glass in a higher amount than the first region and the third region, and the third region includes copper in a higher amount than the first region and the second region.Type: ApplicationFiled: July 5, 2023Publication date: November 9, 2023Inventors: Keita KITAHARA, Yuta SAITO, Noriyuki OOKAWA, Riyousuke AKAZAWA, Takefumi TAKAHASHI, Masahiro WAKASHIMA, Yuta KUROSU, Akito MORI
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Patent number: 11810725Abstract: A multilayer ceramic capacitor includes a multilayer body including an inner layer portion including dielectric layers and internal electrode layers alternately laminated therein, two outer layer portions respectively provided on both sides of the inner layer portion in a lamination direction, and two side gap portions respectively provided on both side surfaces of the inner layer portion and the outer layer portions, in a width direction intersecting the lamination direction, and external electrodes respectively provided on both end surfaces of the multilayer body in a length direction intersecting the lamination direction and the width direction, and each connected to the internal electrode layers, wherein nickel and magnesium are segregated between the side gap portions and the outer layer portions.Type: GrantFiled: September 28, 2021Date of Patent: November 7, 2023Assignee: MURATA MANUFACTURING CO., LTD.Inventors: Keita Kitahara, Yuta Saito, Noriyuki Ookawa, Riyousuke Akazawa, Takefumi Takahashi, Masahiro Wakashima, Yuta Kurosu, Akito Mori
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Publication number: 20230352243Abstract: In a multilayer ceramic capacitor, a positional deviation in a lamination direction between end portions in a width direction intersecting the lamination direction and a length direction, of two of internal electrode layers adjacent to each other in the lamination direction, is about 5 ?m or less. A connection ratio N1/N0 at the middle portion thereof, and a connection ratio N2/N0 at the end portion thereof are about 90% or more, respectively, and a difference between N1/N0 and N2/N0 is about 10% or less.Type: ApplicationFiled: July 5, 2023Publication date: November 2, 2023Inventors: Keita KITAHARA, Yuta SAITO, Noriyuki OOKAWA, Riyousuke AKAZAWA, Takefumi TAKAHASHI, Masahiro WAKASHIMA, Yuta KUROSU, Akito MORI
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Publication number: 20230317374Abstract: A multilayer ceramic capacitor includes a multilayer body including dielectric layers and internal electrode layers, and external electrodes. The multilayer body includes side margin portions made of a dielectric. In the internal electrode layers, a width of an extension electrode portion is smaller than a width of a counter electrode portion. The side margin portions each include Ba and Ti as a main component and Mg as a sub component. The Mg content is about 0.2 mol% or more and about 2.0 mol% or less with respect to 100 mol of Ti. The internal electrode layers each include Ni as a main component, and an end portion of the counter electrode portion includes Mg as a sub component. The Mg content is about 0.13 mol% or more and about 0.39 mol% or less with respect to 100 mol of Ni.Type: ApplicationFiled: February 14, 2023Publication date: October 5, 2023Inventors: Natsuko OKUBO, Akito MORI, Kazuhisa UCHIDA
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Patent number: 11735368Abstract: In a multilayer ceramic capacitor, a positional deviation in a lamination direction between end portions in a width direction intersecting the lamination direction and a length direction, of two of internal electrode layers adjacent to each other in the lamination direction, is about 5 ?m or less. A connection ratio N1/N0 at the middle portion thereof, and a connection ratio N2/N0 at the end portion thereof are about 90% or more, respectively, and a difference between N1/N0 and N2/N0 is about 10% or less.Type: GrantFiled: September 28, 2021Date of Patent: August 22, 2023Assignee: MURATA MANUFACTURING CO., LTD.Inventors: Keita Kitahara, Yuta Saito, Noriyuki Ookawa, Riyousuke Akazawa, Takefumi Takahashi, Masahiro Wakashima, Yuta Kurosu, Akito Mori
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Patent number: 11735369Abstract: A multilayer ceramic capacitor includes a multilayer body including dielectric layers and internal electrode layers alternately laminated therein, and external electrode layers respectively provided on both end surfaces of the multilayer body in a length direction intersecting a lamination direction, and each connected to the internal electrode layers, the external electrode layers each further including a base electrode layer including a first region, a second region, and a third region divided therein, in order from the multilayer body. The first region includes a metal included in the internal electrode layers in a higher amount than the second region and the third region, the second region includes glass in a higher amount than the first region and the third region, and the third region includes copper in a higher amount than the first region and the second region.Type: GrantFiled: September 28, 2021Date of Patent: August 22, 2023Assignee: MURATA MANUFACTURING CO., LTD.Inventors: Keita Kitahara, Yuta Saito, Noriyuki Ookawa, Riyousuke Akazawa, Takefumi Takahashi, Masahiro Wakashima, Yuta Kurosu, Akito Mori
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Publication number: 20230099467Abstract: A multilayer ceramic capacitor includes dielectric layers made of a ceramic material and internal electrode layers laminated therein. The internal electrode layers each include dielectric columns provided therein. A solid solution layer in which S is solidly dissolved is provided at an interface between each of the dielectric columns and each of the internal electrode layers.Type: ApplicationFiled: September 19, 2022Publication date: March 30, 2023Inventors: Takumi ENDOU, Sho WATANABE, Akito MORI, Masahiro WAKASHIMA
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Publication number: 20230101251Abstract: A multilayer ceramic capacitor includes a multilayer body including an inner layer portion including internal electrode layers and inner dielectric layers laminated alternately, and internal electrode layers at both ends thereof in a lamination direction, and outer dielectric layers covering the inner layer portion, and two external electrodes on both end surfaces of the multilayer body in a length direction intersecting the lamination direction. The inner and outer dielectric layers each include grains, and a difference between an average grain size of grains in the inner dielectric layers and an average grain size of grains in the outer dielectric layers is about 100 nm or less.Type: ApplicationFiled: September 19, 2022Publication date: March 30, 2023Inventors: Akito MORI, Masahiro WAKASHIMA, Sho WATANABE, Takumi ENDOU
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Patent number: 11443895Abstract: A multilayer ceramic capacitor includes a laminate including a dielectric ceramic layer and first and second electrode layers laminated in a lamination direction, and first and second external electrodes respectively connected to the first and second internal electrode layers. The laminate includes a central layer portion, a peripheral layer portion sandwiching the central layer portion, and a side margin sandwiching the central layer portion and the peripheral layer portion. The first and second internal electrode layers and the first and second external electrodes include Ni. In a cross section including the lamination direction and a width direction, a Ni content of the peripheral layer portion is larger at a surface portion than at a central portion in a thickness direction, and a Ni content of the side margin is larger at a surface portion than at a central portion in a thickness direction of the side margin.Type: GrantFiled: March 18, 2020Date of Patent: September 13, 2022Assignee: MURATA MANUFACTURING CO., LTD.Inventors: Akitaka Doi, Akito Mori, Kazuhisa Uchida
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Publication number: 20220139633Abstract: A multilayer ceramic capacitor package accommodating multilayer ceramic capacitors includes a carrier tape that is elongated and includes recess pockets at equal or substantially equal intervals in a longitudinal direction, a cover tape that is elongated and attached to the carrier tape to cover an opening of each of the pockets, and the multilayer ceramic capacitors respectively accommodated in the pockets. In the multilayer ceramic capacitor package, in adjacent multilayer ceramic capacitors, a difference in densities of surfaces on an opening side of the pockets is about 0% or more and about 4% or less.Type: ApplicationFiled: October 7, 2021Publication date: May 5, 2022Inventors: Masahiro WAKASHIMA, Yuta SAITO, Akito MORI
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Publication number: 20220102077Abstract: In a multilayer ceramic capacitor, a positional deviation in a lamination direction between end portions in a width direction intersecting the lamination direction and a length direction, of two of internal electrode layers adjacent to each other in the lamination direction, is about 5 ?m or less. A connection ratio N1/N0 at the middle portion thereof, and a connection ratio N2/N0 at the end portion thereof are about 90% or more, respectively, and a difference between N1/N0 and N2/N0 is about 10% or less.Type: ApplicationFiled: September 28, 2021Publication date: March 31, 2022Inventors: Keita KITAHARA, Yuta SAITO, Noriyuki OOKAWA, Riyousuke AKAZAWA, Takefumi TAKAHASHI, Masahiro WAKASHIMA, Yuta KUROSU, Akito MORI
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Publication number: 20220102078Abstract: A multilayer ceramic capacitor includes a multilayer body including an inner layer portion including dielectric layers and internal electrode layers alternately laminated therein, two outer layer portions respectively provided on both sides of the inner layer portion in a lamination direction, and two side gap portions respectively provided on both side surfaces of the inner layer portion and the outer layer portions, in a width direction intersecting the lamination direction, and external electrodes respectively provided on both end surfaces of the multilayer body in a length direction intersecting the lamination direction and the width direction, and each connected to the internal electrode layers, wherein nickel and magnesium are segregated between the side gap portions and the outer layer portions.Type: ApplicationFiled: September 28, 2021Publication date: March 31, 2022Inventors: Keita KITAHARA, Yuta SAITO, Noriyuki OOKAWA, Riyousuke AKAZAWA, Takefumi TAKAHASHI, Masahiro WAKASHIMA, Yuta KUROSU, Akito MORI
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Publication number: 20220102075Abstract: A multilayer ceramic capacitor includes a multilayer body including dielectric layers and internal electrode layers alternately laminated therein, base electrode layers respectively provided on both end surfaces of the multilayer body in a length direction intersecting a lamination direction, and each connected to the internal electrode layers and each including glass and copper, and plated layers respectively provided on an outer side of the base electrode layers. A protective layer including sulfur is provided between the glass included in the base electrode layers and the plated layers.Type: ApplicationFiled: September 28, 2021Publication date: March 31, 2022Inventors: Keita KITAHARA, Yuta SAITO, Noriyuki OOKAWA, Riyousuke AKAZAWA, Takefumi TAKAHASHI, Masahiro WAKASHIMA, Yuta KUROSU, Akito MORI
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Publication number: 20220102079Abstract: A multilayer ceramic capacitor includes a multilayer body including dielectric layers and internal electrode layers alternately laminated therein, and external electrode layers respectively provided on both end surfaces of the multilayer body in a length direction intersecting a lamination direction, and each connected to the internal electrode layers, the external electrode layers each further including a base electrode layer including a first region, a second region, and a third region divided therein, in order from the multilayer body. The first region includes a metal included in the internal electrode layers in a higher amount than the second region and the third region, the second region includes glass in a higher amount than the first region and the third region, and the third region includes copper in a higher amount than the first region and the second region.Type: ApplicationFiled: September 28, 2021Publication date: March 31, 2022Inventors: Keita KITAHARA, Yuta SAITO, Noriyuki OOKAWA, Riyousuke AKAZAWA, Takefumi TAKAHASHI, Masahiro WAKASHIMA, Yuta KUROSU, Akito MORI
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Patent number: 11270845Abstract: A multilayer ceramic capacitor includes a laminate including dielectric layers and internal electrode layers laminated together in a lamination direction, and a pair of external electrodes on both end surfaces of the laminate, the external electrodes being connected to the internal electrode layers, wherein a barrier is provided on a widthwise end of at least one internal electrode layer, the barrier having a thickness that decreases from the widthwise end of the internal electrode layer toward a side margin in a width direction, a void is defined by the widthwise end of the internal electrode layer, the barrier, and the side margin, and the barrier contains Ni and Sn.Type: GrantFiled: August 10, 2020Date of Patent: March 8, 2022Assignee: MURATA MANUFACTURING CO., LTD.Inventors: Yuta Saito, Akito Mori, Takefumi Takahashi, Masahiro Wakashima