Abstract: A semiconductor module (semiconductor device) includes a case that has a side wall to form a frame, the side wall having a concave portion, a multi-layer structure in which a first terminal, an insulating sheet, and a second terminal are stacked in that order and which is disposed on the concave portion, and a beam member that is attached to the concave portion of the case to fix the multi-layer structure disposed on the concave portion.

Abstract: A semiconductor device includes: an insulated circuit substrate; a power semiconductor element mounted on the insulated circuit substrate; a first terminal having a plate-like shape having a first main surface and electrically connected to the power semiconductor element; a second terminal having a second main surface opposed to the first main surface of the first terminal and electrically connected to the power semiconductor element; an insulating sheet interposed between the first main surface and the second main surface; and a conductive film provided on at least one of the first main surface side and the second main surface side of the insulating sheet.

Abstract: Provided is a semiconductor module that can improve the insulation properties at terminals to which electric power is supplied.

Abstract: A semiconductor device includes a terminal portion including a second external terminal, an insulating sheet disposed on the second external terminal, and a first external terminal disposed on the insulating sheet. The first external terminal has a first end portion with a first end. At the first end portion, a rear surface of the first external terminal is not parallel to a front surface of the second external terminal so that, in a thickness direction of the first external terminal, a distance between the first external terminal and the second external terminal increases with as the first end is approached.

Abstract: A semiconductor module includes first to fourth semiconductor elements, each having an upper-surface electrode and a lower-surface electrode, first to fourth conductive layers, each extending in a first direction and being independently disposed side by side in a second direction orthogonal to the first direction, and an output terminal connected to the second and third conductive layers. The lower-surface electrodes of each of the first to fourth semiconductor elements are respectively conductively connected to the first to fourth conductive layers. The third conductive layer and the fourth conductive layer are disposed between the first conductive layer and the second conductive layer and are connected to the output terminal to have an equal potential.

Abstract: A semiconductor module includes an insulating substrate having a main wiring layer, positive and negative electrode terminals adjacently arranged in a first direction, a plurality of semiconductor elements forming a first column and another plurality of semiconductor elements forming a second column, each semiconductor element having gate and source electrode on an upper surface thereof, and being disposed on the main wiring layer such that corresponding ones of the gate electrodes in the first and second columns face each other in a second direction orthogonal to the first direction, a control wiring substrate between the first and second columns and having gate and source wiring layers, a gate wiring member connecting ones of the gate electrodes in the first and second columns through the gate wiring layer, and a source wiring member connecting ones of the source electrodes in the first and second columns through the source wiring layer.

Abstract: A semiconductor module includes a first semiconductor element and a second semiconductor element each having an upper-surface electrode and a lower-surface electrode, and being connected in parallel to configure an upper arm, a first conductive layer having a U-shape in planar view, having two end portions, and having an upper surface on which the first semiconductor element and the second semiconductor element are disposed in a mirror image arrangement, a positive electrode terminal having a body part and at least two positive electrode ends branched from the body part, and a negative electrode terminal having a negative electrode end disposed between the positive electrode ends. The positive electrode ends are respectively connected to one of the two end portions of the first conductive layer.

Abstract: A semiconductor module includes a case with a side wall in a first direction in which gate and source terminals are embodied and exposed therefrom, first and second semiconductor elements each having gate and source electrodes, gate and source relay layers positioned at a center between the first and second semiconductor elements in the first direction at a side of the semiconductor elements farther from the side wall, first gate and source wires respectively connecting the gate and source terminals to the gate and source relay layers, second gate and source wires, and third gate and source wires, respectively connecting the gate and source electrodes of the first semiconductor element, and the gate and source electrode of the second semiconductor element, to the gate and source relay layers. The first to third source wires are respectively located closer to the first to third gate wires than any other gate wires.

Abstract: A semiconductor module includes a first semiconductor element and a second semiconductor element each having an upper-surface electrode and a lower-surface electrode, and being connected in parallel to configure an upper arm, a first conductive layer having a U-shape in planar view, having two end portions, and having an upper surface on which the first semiconductor element and the second semiconductor element are disposed in a mirror image arrangement, a positive electrode terminal having a body part and at least two positive electrode ends branched from the body part, and a negative electrode terminal having a negative electrode end disposed between the positive electrode ends. The positive electrode ends are respectively connected to one of the two end portions of the first conductive layer.

Abstract: A semiconductor module includes first to fourth semiconductor elements, each having an upper-surface electrode and a lower-surface electrode, first to fourth conductive layers, each extending in a first direction and being independently disposed side by side in a second direction orthogonal to the first direction, and an output terminal connected to the second and third conductive layers. The lower-surface electrodes of each of the first to fourth semiconductor elements are respectively conductively connected to the first to fourth conductive layers. The third conductive layer and the fourth conductive layer are disposed between the first conductive layer and the second conductive layer and are connected to the output terminal to have an equal potential.

Abstract: A semiconductor module includes a case with a side wall in a first direction in which gate and source terminals are embodied and exposed therefrom, first and second semiconductor elements each having gate and source electrodes, gate and source relay layers positioned at a center between the first and second semiconductor elements in the first direction at a side of the semiconductor elements farther from the side wall, first gate and source wires respectively connecting the gate and source terminals to the gate and source relay layers, second gate and source wires, and third gate and source wires, respectively connecting the gate and source electrodes of the first semiconductor element, and the gate and source electrode of the second semiconductor element, to the gate and source relay layers. The first to third source wires are respectively located closer to the first to third gate wires than any other gate wires.

Abstract: A semiconductor module includes an insulating substrate having a main wiring layer, positive and negative electrode terminals adjacently arranged in a first direction, a plurality of semiconductor elements forming a first column and another plurality of semiconductor elements forming a second column, each semiconductor element having gate and source electrode on an upper surface thereof, and being disposed on the main wiring layer such that corresponding ones of the gate electrodes in the first and second columns face each other in a second direction orthogonal to the first direction, a control wiring substrate between the first and second columns and having gate and source wiring layers, a gate wiring member connecting ones of the gate electrodes in the first and second columns through the gate wiring layer, and a source wiring member connecting ones of the source electrodes in the first and second columns through the source wiring layer.