Abstract: According to one aspect, a semiconductor device includes: a buffer layer disposed on a front surface of a second semiconductor layer, and having at least one opening in plan view; and an electrode disposed over the second semiconductor layer and the buffer layer, and being in contact with the second semiconductor layer through the at least one opening, wherein the buffer layer has a higher Vickers hardness than the electrode, and a width w of each of the at least one opening satisfies w<Wth, where s is a thickness of the buffer layer, t is a thickness of the electrode, and Wth=2×(s×t?s2)0.5 holds true.

Abstract: According to one aspect, a semiconductor device includes: a buffer layer disposed on a front surface of a second semiconductor layer, and having at least one opening in plan view; and an electrode disposed over the second semiconductor layer and the buffer layer, and being in contact with the second semiconductor layer through the at least one opening, wherein the buffer layer has a higher Vickers hardness than the electrode, and a width w of each of the at least one opening satisfies w<Wth, where s is a thickness of the buffer layer, t is a thickness of the electrode, and Wth=2×(s×t?s2)0.5 holds true.

Abstract: It is an object of the present invention to provide a technique of preventing electric-field concentration in a first P-type semiconductor layer during recovery operation. A semiconductor device includes a drift layer, an N-type semiconductor layer, a first P-type semiconductor layer, a second P-type semiconductor layer, an electrode, and an insulating layer. The N-type semiconductor layer and the first P-type semiconductor layer are disposed below the drift layer while being adjacent to each other in a lateral direction. The insulating layer is disposed above the first P-type semiconductor layer while being in contact with the second P-type semiconductor layer and the electrode.

Abstract: It is an object of the present invention to provide a technique of preventing electric-field concentration in a first P-type semiconductor layer during recovery operation. A semiconductor device includes a drift layer, an N-type semiconductor layer, a first P-type semiconductor layer, a second P-type semiconductor layer, an electrode, and an insulating layer. The N-type semiconductor layer and the first P-type semiconductor layer are disposed below the drift layer while being adjacent to each other in a lateral direction. The insulating layer is disposed above the first P-type semiconductor layer while being in contact with the second P-type semiconductor layer and the electrode.

Abstract: A semiconductor device includes: a semiconductor substrate; a device region on the semiconductor substrate; a planar edge termination region on the semiconductor substrate to surround the device region; and a passivation film covering the edge termination region, wherein the passivation film includes a semi-insulating film directly contacting the semiconductor substrate.

Abstract: A p-type anode layer (2) is provided on an upper surface of an n-type drift layer (1). An n-type cathode layer (3) is provided on a lower surface of the n?-type drift layer (1). An n-type buffer layer (4) is provided between the n?-type drift layer (1) and the n-type cathode layer (3). A peak impurity concentration in the n-type buffer layer (4) is higher than that in the n?-type drift layer (1) and lower than that in the n-type cathode layer (3). A gradient of carrier concentration at a connection between the n?-type drift layer (1) and the n-type buffer layer (4) is 20 to 2000 cm?4.

Abstract: An electric field buffer layer is formed so as to surround an active region. The electric field buffer layer includes a plurality of P-type impurity layers. Each of the P-type impurity layers includes P-type implantation layers and P-type diffusion layers that are formed so as to respectively surround the P-type implantation layers and contain P-type impurities at a concentration lower than that of the P-type implantation layers. A first P-type implantation layer is formed to be in contact with or to partially overlap the active region. Each of the P-type diffusion layers is formed to have an expansion to a degree to which the first P-type diffusion layer is in contact with or overlaps a second P-type diffusion layer. Intervals between the P-type implantation layers increase from the active region toward the outer peripheral portion of the semiconductor substrate.

Abstract: A p-type anode layer (2) provided on an n-type drift layer (1) in the active region. A p-type diffusion layer (3) is provided on the n-type drift layer (1) in a termination region outside the active region. An oxide film (4) covers an outer periphery of the p-type anode layer (2). An anode electrode (5) is connected to a portion of the p-type anode layer (2) not covered with the oxide film (4). An n+-type cathode layer (7) is provided below the n-type drift layer (1). A cathode electrode (8) is connected to the n+-type cathode layer (7). An area of a portion of the p-type anode layer (2) covered with the oxide film (4) is 5 to 30% of a total area of the p-type anode layer (2).

Abstract: A p-type anode layer (2) is provided on an upper surface of an n-type drift layer (1). An n-type cathode layer (3) is provided on a lower surface of the n?-type drift layer (1). An n-type buffer layer (4) is provided between the n?-type drift layer (1) and the n-type cathode layer (3). A peak impurity concentration in the n-type buffer layer (4) is higher than that in the n?-type drift layer (1) and lower than that in the n-type cathode layer (3). A gradient of carrier concentration at a connection between the n?-type drift layer (1) and the n-type buffer layer (4) is 20 to 2000 cm?4.

Abstract: A semiconductor device includes: an N-type drift layer; a P-type anode layer on the N-type drift layer; a trench penetrating the P-type anode layer; a conductive substance embedded in the trench via an insulating film; and an N-type buffer layer between the N-type drift layer and the P-type anode layer and having impurity concentration which is higher than that of the N-type drift layer.

Abstract: An electric field buffer layer (13) is formed so as to surround an active region (12) from an outer peripheral portion of the active region (12) toward an outer peripheral portion of a semiconductor substrate (11). The electric field buffer layer (13) includes a plurality of P-type impurity layers (21 to 25). Each of the P-type impurity layers (21 to 25) includes P-type implantation layers (21a to 25a) and P-type diffusion layers (21b to 25b) that are formed so as to respectively surround the P-type implantation layers (21a to 25a) and contain P-type impurities at a concentration lower than that of the P-type implantation layers (21a to 25a). A first P-type implantation layer (21a) is formed to be in contact with or to partially overlap the active region (12). Each of the P-type diffusion layers (21b to 25b) is formed to have an expansion to a degree to which the first P-type diffusion layer (21b) is in contact with or overlaps a second P-type diffusion layer (22b).

Abstract: A p-type anode layer (2) provided on an n-type drift layer (1) in the active region. A p-type diffusion layer (3) is provided on the n-type drift layer (1) in a termination region outside the active region. An oxide film (4) covers an outer periphery of the p-type anode layer (2). An anode electrode (5) is connected to a portion of the p-type anode layer (2) not covered with the oxide film (4). An n+-type cathode layer (7) is provided below the n-type drift layer (1). A cathode electrode (8) is connected to the n+-type cathode layer (7). An area of a portion of the p-type anode layer (2) covered with the oxide film (4) is 5 to 30% of a total area of the p-type anode layer (2).

Abstract: A semiconductor device includes: an N-type drift layer; a P-type anode layer on the N-type drift layer; a trench penetrating the P-type anode layer; a conductive substance embedded in the trench via an insulating film; and an N-type buffer layer between the N-type drift layer and the P-type anode layer and having impurity concentration which is higher than that of the N-type drift layer.

Abstract: A semiconductor device includes: an N-type drift layer; a P-type anode layer on the N-type drift layer; a trench penetrating the P-type anode layer; a conductive substance embedded in the trench via an insulating film; and an N-type buffer layer between the N-type drift layer and the P-type anode layer and having impurity concentration which is higher than that of the N-type drift layer.