Abstract: A semiconductor device includes a molded body and an interconnection layer. The molded body includes a semiconductor chip, at least one terminal body disposed around the semiconductor chip and a resin member provided between the semiconductor chip and the terminal body. The molded body has a first surface, a second surface opposite to the first surface and a side surface connected to the first and second surfaces. The interconnection layer is provided on the first surface of the molded body. The interconnection layer includes an interconnect electrically connecting the semiconductor chip and the terminal body. The terminal body has first and second contact surfaces. The first contact surface is exposed at the first or second surface of the molded body. The second contact surface is connected to the first contact surface and exposed at the side surface of the molded body.

Abstract: A semiconductor device according to an aspect of the present technology includes a low-concentration N-type region, a first high-concentration N-type region and a second high-concentration N-type region that are stacked with the low-concentration N-type region interposed therein, a gate electrode that surrounds the low-concentration N-type region as viewed from a stacking direction, which is a direction in which the low-concentration N-type region, the first high-concentration N-type region, and the second high-concentration N-type region are stacked, a first insulating film placed between the gate electrode and the low-concentration N-type region, and a second insulating film placed between the gate electrode and the first high-concentration N-type region. The first high-concentration N-type region is connected to one of a source electrode and a drain electrode. The second high-concentration N-type region is connected to the other of the source electrode and the drain electrode.

Abstract: According to one embodiment, a semiconductor device includes a first semiconductor chip, a heat dissipation member provided on one surface of the first semiconductor chip and connected to the first semiconductor chip, and a sealing resin sealing the first semiconductor chip and the heat dissipation member. The heat dissipation member includes mutually interlaced metal fibers and a thermosetting resin.

Abstract: A semiconductor device includes a molded body and an interconnection layer. The molded body includes a semiconductor chip, at least one terminal body disposed around the semiconductor chip and a resin member provided between the semiconductor chip and the terminal body. The molded body has a first surface, a second surface opposite to the first surface and a side surface connected to the first and second surfaces. The interconnection layer is provided on the first surface of the molded body. The interconnection layer includes an interconnect electrically connecting the semiconductor chip and the terminal body. The terminal body has first and second contact surfaces. The first contact surface is exposed at the first or second surface of the molded body. The second contact surface is connected to the first contact surface and exposed at the side surface of the molded body.

Abstract: According to one embodiment, a semiconductor device includes a first semiconductor chip, a heat dissipation member provided on one surface of the first semiconductor chip and connected to the first semiconductor chip, and a sealing resin sealing the first semiconductor chip and the heat dissipation member. The heat dissipation member includes mutually interlaced metal fibers and a thermosetting resin.

Abstract: A semiconductor package comprises a resin material, a semiconductor chip in the resin material, and a metal member in the resin material. The metal member has a first surface that faces the semiconductor chip and a second surface that is opposed to the first surface. The first surface of the metal member has a plurality of first recess portions formed thereon. The first recess portions extend into the metal member and have an opening width that is less than a bottom width.

Abstract: A semiconductor device includes a first supporting body, a first adhesive body, a first chip, a second adhesive body, a second chip, and a resin sealing member. The first adhesive body is provided on the first supporting body. The first chip includes an integrated circuit, and is provided on the first adhesive body. The second adhesive body is provided on the first chip. The second chip is provided on the second adhesive body. A coefficient of linear expansion of the second chip is not less than ?75% and not more than +50% of that of the first chip. A thickness of the second chip is not less than 0.3 times and not more than 1.7 times of that of the first chip. The resin sealing member is provided around the first supporting body, the first and second adhesive bodies, and the first and second chip.

Abstract: A semiconductor package comprises a resin material, a semiconductor chip in the resin material, and a metal member in the resin material. The metal member has a first surface that faces the semiconductor chip and a second surface that is opposed to the first surface. The first surface of the metal member has a plurality of first recess portions formed thereon. The first recess portions extend into the metal member and have an opening width that is less than a bottom width.

Abstract: A method for manufacturing a semiconductor device includes preparing a lead frame that includes a die pad including a first plane and a second plane located on an opposite side of the first plane, and a plurality of leads arranged next to the die pad, mounting a semiconductor chip including a surface, a plurality of electrodes formed over the surface, and a reverse side located on an opposite side of the surface over a chip mounting area of the first plane of the die pad, electrically coupling parts of the electrodes of the semiconductor chip and the leads through a plurality of first wires and electrically coupling other parts of the electrodes and the die pad through a second wire after the mounting the semiconductor chip, and after the electrically coupling, sealing the semiconductor chip, the first wires, and the second wire with a resin.

Abstract: A semiconductor device, includes a die pad that has a first main surface and a second main surface located on the opposite side of the first main surface; a lead arranged next to the die pad; a semiconductor chip that has a surface, a first electrode and a second electrode formed on the surface, and a reverse side located on the opposite side of the surface, and is mounted on a chip mounting area of the first main of the die pad; a first wire that electrically couples the first electrode of the semiconductor chip and the lead; a second wire that electrically couples the second electrode of the semiconductor chip and the die pad; and a sealed body that seals the semiconductor chip, the first wire, and the second wire.

Abstract: A technique capable of enhancing a reliability of a semiconductor device is provided. A semiconductor device has a die pad on which a semiconductor chip is mounted. The die pad is sealed with resin so that a lower surface located on an opposite side of an upper surface on which the semiconductor chip is mounted is exposed. Also, the die pad has a central part including a region in which the semiconductor chip is mounted and a peripheral edge part provided next to the central part in a planar view. In addition, a step surface formed so that a height of the peripheral edge part becomes higher than a height of the central part is provided at a boundary between the central part and the peripheral edge part.

Abstract: A semiconductor device, includes a die pad that has a first main surface and a second main surface located on the opposite side of the first main surface; a lead arranged next to the die pad; a semiconductor chip that has a surface, a first electrode and a second electrode formed on the surface, and a reverse side located on the opposite side of the surface, and is mounted on a chip mounting area of the first main of the die pad; a first wire that electrically couples the first electrode of the semiconductor chip and the lead; a second wire that electrically couples the second electrode of the semiconductor chip and the die pad; and a sealed body that seals the semiconductor chip, the first wire, and the second wire.

Abstract: A method for manufacturing a semiconductor device, includes: (a) preparing a lead frame that includes a die pad having a first plane and a second plane located on the opposite side of the first plane, and a plurality of leads arranged next to the die pad; (b) mounting a semiconductor chip having a surface, a plurality of electrodes formed over the surface, and a reverse side located on the opposite side of the surface over a chip mounting area of the first plane of the die pad; (c) electrically coupling parts of the electrodes of the semiconductor chip and the leads through a plurality of first wires and electrically coupling the other parts of the electrodes and the die pad through a second wire.

Abstract: A method for manufacturing a semiconductor device, includes: (a) preparing a lead frame that includes a die pad having a first plane and a second plane located on the opposite side of the first plane, and a plurality of leads arranged next to the die pad; (b) mounting a semiconductor chip having a surface, a plurality of electrodes formed over the surface, and a reverse side located on the opposite side of the surface over a chip mounting area of the first plane of the die pad; (c) electrically coupling parts of the electrodes of the semiconductor chip and the leads through a plurality of first wires and electrically coupling the other parts of the electrodes and the die pad through a second wire.

Abstract: A method according to the invention has a bonding process of mounting a semiconductor chip on an upper surface of a die pad that has the upper surface whose area is larger than a reverse side of the semiconductor chip. It also has a sealed body formation process of sealing the semiconductor chip so that an undersurface opposite to the upper surface of the die pad may be exposed after the bonding process. Here, the upper surface of the die pad is arranged around an area over which the semiconductor chip is mounted, and has a hollow part arrangement area in which a groove or multiple holes are formed. Moreover, surface roughness of the upper surface is made coarser than surface roughness of the undersurface.

Abstract: A technique capable of enhancing a reliability of a semiconductor device is provided. A semiconductor device has a die pad on which a semiconductor chip is mounted. The die pad is sealed with resin so that a lower surface located on an opposite side of an upper surface on which the semiconductor chip is mounted is exposed. Also, the die pad has a central part including a region in which the semiconductor chip is mounted and a peripheral edge part provided next to the central part in a planar view. In addition, a step surface formed so that a height of the peripheral edge part becomes higher than a height of the central part is provided at a boundary between the central part and the peripheral edge part.

Abstract: A method according to the invention has a bonding process of mounting a semiconductor chip on an upper surface of a die pad that has the upper surface whose area is larger than a reverse side of the semiconductor chip. It also has a sealed body formation process of sealing the semiconductor chip so that an undersurface opposite to the upper surface of the die pad may be exposed after the bonding process. Here, the upper surface of the die pad is arranged around an area over which the semiconductor chip is mounted, and has a hollow part arrangement area in which a groove or multiple holes are formed. Moreover, surface roughness of the upper surface is made coarser than surface roughness of the undersurface.