Patents by Inventor Akitoshi Ishizaka
Akitoshi Ishizaka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20080243019Abstract: A respiratory function measuring device comprises: a three-dimensional measuring unit that measures a chest movement and an abdomen movement of a breathing animal; a first measuring unit that measures a time T1 where a rate of volume decrease of the abdomen is maximized in an expiration; a second measuring unit that measures a time T2 where a rate of volume decrease of the chest is maximized in the expiration; and a respiratory time difference outputting unit that computes and outputs a value Tde corresponding to T2-T1. This allows measuring respiratory function to diagnose an obstructive pulmonary disease, a restrictive pulmonary disease, and the like in a natural state, for a subject of a breathing animal, even if the subject does not have a sense of self-awareness.Type: ApplicationFiled: December 19, 2007Publication date: October 2, 2008Applicant: KEIO UniversityInventors: Shuko Tsujimura, Hidetoshi Nakamura, Akitoshi Ishizaka, Isao Sato
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Patent number: 7116291Abstract: The present invention provides an image display capable of reducing power used up or consumed by a thin-film electron-emitter matrix.Type: GrantFiled: September 4, 2000Date of Patent: October 3, 2006Assignee: Hitachi, Ltd.Inventors: Mutsumi Suzuki, Toshiaki Kusunoki, Makoto Okai, Masakazu Sagawa, Akitoshi Ishizaka
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Publication number: 20060057134Abstract: An antibody which binds to a “peptide consisting of the amino acid sequence represented by SEQ ID NO:1”, and a method for assaying a “peptide comprising the amino acid sequence represented by SEQ ID NO:1” in a sample and a method for detecting a bacterial pneumonia, wherein the methods use the antibody or the like.Type: ApplicationFiled: July 22, 2003Publication date: March 16, 2006Inventors: Teruo Kirikae, Kiminori Toyooka, Yoshikazu Naiki, Hiroshi Tamura, Akitoshi Ishizaka, Satoru Hashimoto
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Publication number: 20050032117Abstract: The invention provides a method for assessment of cystic lung fibrosis (CF) in terms of severity, acuteness, degree of progress, etc. of CF., with high accuracy, high sensitivity, convenience, rapidity, and low cost. The method includes the steps of measuring the level of CAP 18 in a biological sample, and correlating the measurement with CF.Type: ApplicationFiled: February 13, 2004Publication date: February 10, 2005Inventors: Richard Moss, Akitoshi Ishizaka, Teruo Kirikae
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Patent number: 6818941Abstract: As the top electrode material of a thin-film electron emitter, a material having a bandgap wider than that of Si and electrical conductivity is used. In particular, a conductive oxide such as an SnO2 or ITO film and a wide-bandgap semiconductor such as GaN or SiC are employed. The electron energy loss in a top electrode through which hot electrons pass can be reduced so as to enhance the electron emission efficiency. A high emission current can be obtained in the case of the same diode current as a prior art. In addition, in the case of the same emission current density as a prior art, a small driving current is enough. A bus line and driving circuits can be simplified.Type: GrantFiled: November 28, 2001Date of Patent: November 16, 2004Assignee: Hitachi, Ltd.Inventors: Mutsumi Suzuki, Toshiaki Kusunoki, Masakazu Sagawa, Makoto Okai, Akitoshi Ishizaka
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Patent number: 6570321Abstract: A process for manufacturing a thin-film electron source including a lower electrode (11), an upper electrode, and an insulating layer sandwiched between the lower electrode (11) and the upper electrode. The process comprises a first step of forming an anodized film over the surface of the lower electrode (11) by an anodizing method, a second step of etching the surface side of the anodized film, and a third step of forming an anodized film again over the surface of the lower electrode (11) by an anodizing method to form said insulating layer. As a result, the film thickness of such an outer layer (26) of the insulating layer containing much impurity can be reduced to reduce the number of electron trapped.Type: GrantFiled: January 18, 2002Date of Patent: May 27, 2003Assignee: Hitachi, Ltd.Inventors: Toshiaki Kusunoki, Mutsumi Suzuki, Masakazu Sagawa, Makoto Okai, Akitoshi Ishizaka
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Publication number: 20020123697Abstract: A sampling tool comprises a shaft member having a distal end and a proximal end, and an absorber arranged at least at a tip portion of the shaft member, the absorber being a bundle of a plurality of fiber filaments. The sampling tool may have an outer sheath through which the shaft member is freely loaded and unloaded.Type: ApplicationFiled: April 19, 2002Publication date: September 5, 2002Applicant: Olympus Optical Co., LTD.Inventors: Akitoshi Ishizaka, Tatsuya Saito
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Patent number: 5047111Abstract: Films of desired metal, e.g., Ni or Co, and of Si are laminated alternately n a single crystal silicon substrate to form a multi-layered structure, and thereafter the substrate is heated to grow an epitaxial NiSi.sub.2 or CoSi.sub.2 film in solid phase with less diffusion of Ni or Co atoms into the silicon substrate. Each layer in the multi-layered structure has a thickness selected in the range of 30-300 A with the overall composition ratio Si/Ni (or Si/Co) in the range of 1.8-2.0. The lamination process is done at a substrate temperature which does not cause the laminated films to react with the substrate and does not cause the multi-layered structure to become polycrystalline, e.g. below 350.degree. C. for the formation of an NiSi.sub.2 film or below 450.degree. C. for the formation of a CoSi.sub.2 film. The solid phase epitaxy is achieved at a substrate heating temperature in a range of 350.degree.-750.degree. C. for the formation of an epitaxial NiSi.sub.2 film or 450.degree.-1000.degree. C.Type: GrantFiled: October 16, 1987Date of Patent: September 10, 1991Assignee: Director-General of the Agency of Industrial Science and TechnologyInventors: Akitoshi Ishizaka, Yasuhiro Shiraki, Takashi Ohshima
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Patent number: 4984048Abstract: Polycrystalline silicon which is provided within a trench for isolating a plurality of bipolar transistors from each other is electrically connected to the collector of one of the bipolar transistor. Since the trench for isolation can also be used to lead out the collector electrode, the required area is minimized. Thus, the arrangement is effective in creasing the integration density.Type: GrantFiled: July 8, 1988Date of Patent: January 8, 1991Assignee: Hitachi, Ltd.Inventors: Kazuhiko Sagara, Tokuo Kure, Eiichi Murakami, Tohru Nakamura, Masanobu Miyao, Masao Kondo, Akitoshi Ishizaka, Yoichi Tamaki
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Patent number: 4885614Abstract: The present invention discloses a semiconductor device comprising a semiconductor layer being made of monocrystalline silicon or silicon-germanium alloy and a semiconductor layer being made of silicon-germanium-carbon alloy formed thereon, wherein the two layers form a heterojunction therebetween. In such a device, no lattice mismatch occurs between the layers or even if lattice mismatch occurs, it is only slight, so that the silicon-germanium-carbon alloy layer is in no danger of causing misfit dislocation therein.Type: GrantFiled: July 8, 1988Date of Patent: December 5, 1989Assignee: Hitachi, Ltd.Inventors: Seijiro Furukawa, Hiroyuki Etoh, Akitoshi Ishizaka, Toshikazu Shimada
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Patent number: 4785340Abstract: A semiconductor device includes a multilayer semiconductor structure comprising alternately p- (or n-) type heavily doped semiconductor layers and n- (or p-) type lightly doped semiconductor layers. Holes (or electrons) are confined within a narrow layer in a fashion like a two-dimensional gas, whereby high mobility is realized notwithstanding of high carrier concentration. Electrical conductivity of the multilayer semiconductor structure can be made higher than that of a bulk semiconductor. Very high conductivity can be realized by forming each layer in a thickness within a range of 10 .ANG. to 1000 .ANG. and preferably 50 .ANG. to 500 .ANG.. Ratio in impurity concentration of the heavily doped layer to the low doped layer is not smaller than one order of magnitude.Type: GrantFiled: March 13, 1986Date of Patent: November 15, 1988Assignee: Director-General of the Agency of Industrial Science and TechnologyInventors: Kiyokazu Nakagawa, Akitoshi Ishizaka, Yasuhiro Shiraki, Yoshimasa Murayama
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Patent number: 4433202Abstract: A thin film solar cell formed on a substrate, comprising at least first and second electrodes, at least one of which is capable of passing light, a silicon film interposed between said first and second electrodes, and at least one junction formed in the silicon film for separating electrons and positive holes when the cell is exposed to light, wherein said silicon film comprises a mixed phase consisting of a polycrystalline phase and an amorphous phase, and includes at least about 50% by volume of fibrous crystalline grains, each of said grains having a maximum bottom diameter of about 1 .mu.m and a minimum height of about 50 nm and having its grain boundaries terminated with a monovalent element.The solar cell has a high photoelectric conversion efficiency comparable to that of a single-crystal solar cell, and can be produced at a low cost.Type: GrantFiled: March 26, 1982Date of Patent: February 21, 1984Assignee: Hitachi, Ltd.Inventors: Eiichi Maruyama, Toshikazu Shimada, Yasuhiro Shiraki, Yoshifumi Katayama, Hirokazu Matsubara, Akitoshi Ishizaka, Yoshimasa Murayama, Akira Shintani
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Patent number: 4024567Abstract: A semiconductor device has a conductive layer for wiring which is made of an Al alloy containing Mn in an amount greater than 1 percent by weight and below 6 percent by weight. The semiconductor device has excellent corrosion resistance, and has a high reliability.Type: GrantFiled: June 4, 1976Date of Patent: May 17, 1977Assignee: Hitachi, Ltd.Inventors: Seiichi Iwata, Akitoshi Ishizaka, Hiroshi Yamamoto