Patents by Inventor Akitoshi SHIRAO
Akitoshi SHIRAO has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11948850Abstract: In one aspect of the semiconductor module, the sealing material on the lower side of the die stage is thinner than the sealing material on the upper side of the semiconductor element, a bent portion that forms a step with respect to vertical direction in the first lead is provided in a region sealed by the sealing material in the first lead, the side where the die stage is present of the step is positioned below the side where the die stage is not present of the step due to the step, the side where the die stage is not present of the step in the first lead protrudes from one end side of the sealing material, and a groove is provided on an upper side surface, a lower side surface, or both of them of the bent portion of the first lead.Type: GrantFiled: September 2, 2021Date of Patent: April 2, 2024Assignee: Mitsubishi Electric CorporationInventor: Akitoshi Shirao
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Patent number: 11664288Abstract: A method of manufacturing a semiconductor device includes providing, in a housing, an insulating substrate having a metal pattern, a semiconductor chip, a sinter material applied on the semiconductor chip, and a terminal, providing multiple granular sealing resins supported by a grid provided in the housing, heating an inside of the housing until a temperature thereof reaches a first temperature higher than a room temperature and thereby discharging a vaporized solvent of the sinter material out of the housing via a gap of the grid and a gap of the sealing resins, and heating the inside of the housing until the temperature thereof reaches a second temperature higher than the first temperature and thereby causing the melted sealing resins to pass the gap of the grid and form a resin layer covering the semiconductor chip.Type: GrantFiled: August 27, 2021Date of Patent: May 30, 2023Assignee: Mitsubishi Electric CorporationInventors: Kenta Nakahara, Akitoshi Shirao
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Publication number: 20220293434Abstract: A mold die includes a resin injection gate through which fluid resin serving as mold resin is injected toward a cavity, a resin reservoir to store the fluid resin flowing through the cavity, and a resin reservoir gate. The resin reservoir is provided on the side opposite to the side on which the resin injection gate is arranged with the cavity interposed. The resin reservoir gate communicatively connects the cavity and the resin reservoir. The opening cross-sectional area of the resin reservoir gate is smaller than the opening cross-sectional area of the resin injection gate.Type: ApplicationFiled: September 29, 2020Publication date: September 15, 2022Applicant: Mitsubishi Electric CorporationInventors: Takamasa IWAI, Yuichiro SUZUKI, Akitoshi SHIRAO, Akira KOSUGI, Junji FUJINO
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Publication number: 20220173007Abstract: In one aspect of the semiconductor module, the sealing material on the lower side of the die stage is thinner than the sealing material on the upper side of the semiconductor element, a bent portion that forms a step with respect to vertical direction in the first lead is provided in a region sealed by the sealing material in the first lead, the side where the die stage is present of the step is positioned below the side where the die stage is not present of the step due to the step, the side where the die stage is not present of the step in the first lead protrudes from one end side of the sealing material, and a groove is provided on an upper side surface, a lower side surface, or both of them of the bent portion of the first lead.Type: ApplicationFiled: September 2, 2021Publication date: June 2, 2022Applicant: Mitsubishi Electric CorporationInventor: Akitoshi SHIRAO
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Publication number: 20210391231Abstract: A method of manufacturing a semiconductor device includes providing, in a housing, an insulating substrate having a metal pattern, a semiconductor chip, a sinter material applied on the semiconductor chip, and a terminal, providing multiple granular sealing resins supported by a grid provided in the housing, heating an inside of the housing until a temperature thereof reaches a first temperature higher than a room temperature and thereby discharging a vaporized solvent of the sinter material out of the housing via a gap of the grid and a gap of the sealing resins, and heating the inside of the housing until the temperature thereof reaches a second temperature higher than the first temperature and thereby causing the melted sealing resins to pass the gap of the grid and form a resin layer covering the semiconductor chip.Type: ApplicationFiled: August 27, 2021Publication date: December 16, 2021Applicant: Mitsubishi Electric CorporationInventors: Kenta NAKAHARA, Akitoshi SHIRAO
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Patent number: 11195770Abstract: A method of manufacturing a semiconductor device includes providing, in a housing, an insulating substrate having a metal pattern, a semiconductor chip, a sinter material applied on the semiconductor chip, and a terminal, providing multiple granular sealing resins supported by a grid provided in the housing, heating an inside of the housing until a temperature thereof reaches a first temperature higher than a room temperature and thereby discharging a vaporized solvent of the sinter material out of the housing via a gap of the grid and a gap of the sealing resins, and heating the inside of the housing until the temperature thereof reaches a second temperature higher than the first temperature and thereby causing the melted sealing resins to pass the gap of the grid and form a resin layer covering the semiconductor chip.Type: GrantFiled: September 3, 2019Date of Patent: December 7, 2021Assignee: Mitsubishi Electric CorporationInventors: Kenta Nakahara, Akitoshi Shirao
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Patent number: 11171068Abstract: A method of manufacturing a semiconductor device includes providing, in a housing, an insulating substrate having a metal pattern, a semiconductor chip, a sinter material applied on the semiconductor chip, and a terminal, providing multiple granular sealing resins supported by a grid provided in the housing, heating an inside of the housing until a temperature thereof reaches a first temperature higher than a room temperature and thereby discharging a vaporized solvent of the sinter material out of the housing via a gap of the grid and a gap of the sealing resins, and heating the inside of the housing until the temperature thereof reaches a second temperature higher than the first temperature and thereby causing the melted sealing resins to pass the gap of the grid and form a resin layer covering the semiconductor chip.Type: GrantFiled: September 3, 2019Date of Patent: November 9, 2021Assignee: Mitsubishi Electric CorporationInventors: Kenta Nakahara, Akitoshi Shirao
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Patent number: 10861758Abstract: A semiconductor device includes a case surrounding a region that contains semiconductor elements and wires. The case is provided with s(an integer greater than k and equal to or greater than three)-pieces of discharge paths for discharging an encapsulation member to the region. The s-pieces of discharge paths are provided so as to surround the region as seen in a plan view. The s-pieces of discharge paths are spirally provided as seen in a plan view.Type: GrantFiled: June 20, 2019Date of Patent: December 8, 2020Assignee: Mitsubishi Electric CorporationInventor: Akitoshi Shirao
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Patent number: 10734300Abstract: A semiconductor device according to the present invention includes the following: a conductive layer disposed on an insulating substrate; a first semiconductor element and a second semiconductor element that are joined on an opposite surface of the conductive layer opposite from the insulating substrate, with a gap the first semiconductor element and the second semiconductor element; an electrode joined on an opposite surface of the first semiconductor element opposite from the conductive layer, and an opposite surface of the second semiconductor element opposite from the conductive layer, so as to extend over the gap; and resin sealing the conductive layer, the first semiconductor element, the second semiconductor element, and the electrode. The conductive layer has a recess pattern that is disposed on a surface being opposite from the insulating substrate and facing the gap, the recess pattern extending along the gap.Type: GrantFiled: December 8, 2016Date of Patent: August 4, 2020Assignee: Mitsubishi Electric CorporationInventors: Mitsugu Tanaka, Yusuke Ishiyama, Akitoshi Shirao
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Publication number: 20200168519Abstract: A method of manufacturing a semiconductor device includes providing, in a housing, an insulating substrate having a metal pattern, a semiconductor chip, a sinter material applied on the semiconductor chip, and a terminal, providing multiple granular sealing resins supported by a grid provided in the housing, heating an inside of the housing until a temperature thereof reaches a first temperature higher than a room temperature and thereby discharging a vaporized solvent of the sinter material out of the housing via a gap of the grid and a gap of the sealing resins, and heating the inside of the housing until the temperature thereof reaches a second temperature higher than the first temperature and thereby causing the melted sealing resins to pass the gap of the grid and form a resin layer covering the semiconductor chip.Type: ApplicationFiled: September 3, 2019Publication date: May 28, 2020Applicant: Mitsubishi Electric CorporationInventors: Kenta NAKAHARA, Akitoshi SHIRAO
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Publication number: 20200043818Abstract: A semiconductor device includes a case surrounding a region that contains semiconductor elements and wires. The case is provided with s(an integer greater than k and equal to or greater than three)-pieces of discharge paths for discharging an encapsulation member to the region. The s-pieces of discharge paths are provided so as to surround the region as seen in a plan view. The s-pieces of discharge paths are spirally provided as seen in a plan view.Type: ApplicationFiled: June 20, 2019Publication date: February 6, 2020Applicant: Mitsubishi Electric CorporationInventor: Akitoshi SHIRAO
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Publication number: 20190295915Abstract: A semiconductor device according to the present invention includes the following: a conductive layer disposed on an insulating substrate; a first semiconductor element and a second semiconductor element that are joined on an opposite surface of the conductive layer opposite from the insulating substrate, with a gap the first semiconductor element and the second semiconductor element; an electrode joined on an opposite surface of the first semiconductor element opposite from the conductive layer, and an opposite surface of the second semiconductor element opposite from the conductive layer, so as to extend over the gap; and resin sealing the conductive layer, the first semiconductor element, the second semiconductor element, and the electrode. The conductive layer has a recess pattern that is disposed on a surface being opposite from the insulating substrate and facing the gap, the recess pattern extending along the gap.Type: ApplicationFiled: December 8, 2016Publication date: September 26, 2019Inventors: Mitsugu TANAKA, Yusuke ISHIYAMA, Akitoshi SHIRAO