Patents by Inventor Akitsugu Yamaguchi

Akitsugu Yamaguchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10776556
    Abstract: A wiring board design support apparatus, in which a plurality of vias are arranged on a wiring board, includes a design information storage unit that stores design information of vias and wirings to be arranged on the wiring board, and a wiring board via arrangement unit that moves, on a basis of the design information, positions of lattice points arranged with same intervals in vertical and horizontal directions by a given moving amount in a vertical direction and a horizontal direction while alternately changing a moving direction in the horizontal direction of the lattice points for each row of the lattice and alternately changing a moving direction in the vertical direction of the lattice points for each column of the lattice, so as to arrange vias at positions of the lattice points after movement.
    Type: Grant
    Filed: June 27, 2019
    Date of Patent: September 15, 2020
    Assignee: KABUSHIKI KAISHA NIHON MICRONICS
    Inventors: Katsushi Mikuni, Ryuichi Yagisawa, Akitsugu Yamaguchi
  • Publication number: 20200050732
    Abstract: To improve wiring housing property, with preferable work efficiency, without deviation in the vertical direction or the horizontal direction, without expanding via arrangement areas.
    Type: Application
    Filed: June 27, 2019
    Publication date: February 13, 2020
    Applicant: KABUSHIKI KAISHA NIHON MICRONICS
    Inventors: KATSUSHI MIKUNI, RYUICHI YAGISAWA, AKITSUGU YAMAGUCHI
  • Patent number: 8064218
    Abstract: The present invention makes repair easy and reduces effects on the electrical connection conditions of an electronic component to an internal wiring after repair and on the mechanical strength of the repair part in a case of breakage or separation of an electrode for implementation of the electronic component. In a multilayer wiring board, a plurality of wiring sheets each having an internal wiring and a plurality of electrical insulating sheets are arranged alternately in the thickness directions of these sheets, and a plurality of electrodes for implementing an electronic component electrically connected to the internal wirings are formed on the surface of an uppermost sheet. The multilayer wiring board further comprises a plurality of spare electrodes corresponding to the electrodes and electrically connected to the internal wirings connected to the corresponding electrodes directly under the corresponding electrodes on a sheet located directly under the uppermost sheet.
    Type: Grant
    Filed: February 3, 2009
    Date of Patent: November 22, 2011
    Assignee: Kabushiki Kaisha Nihon Micronics
    Inventors: Naoki Suto, Akitsugu Yamaguchi
  • Publication number: 20090242254
    Abstract: The present invention makes repair easy and reduces effects on the electrical connection conditions of an electronic component to an internal wiring after repair and on the mechanical strength of the repair part in a case of breakage or separation of an electrode for implementation of the electronic component. In a multilayer wiring board, a plurality of wiring sheets each having an internal wiring and a plurality of electrical insulating sheets are arranged alternately in the thickness directions of these sheets, and a plurality of electrodes for implementing an electronic component electrically connected to the internal wirings are formed on the surface of an uppermost sheet. The multilayer wiring board further comprises a plurality of spare electrodes corresponding to the electrodes and electrically connected to the internal wirings connected to the corresponding electrodes directly under the corresponding electrodes on a sheet located directly under the uppermost sheet.
    Type: Application
    Filed: February 3, 2009
    Publication date: October 1, 2009
    Applicant: KABUSHIKI KAISHA NIHON MICRONICS
    Inventors: Naoki SUTO, Akitsugu YAMAGUCHI