Abstract: Disclosed herein a thin film capacitor that includes a lower electrode layer, an upper electrode layer, and a dielectric layer disposed between the lower electrode layer and the upper electrode layer. The dielectric layer has a through hole. An inner wall surface of the through hole has a first tapered surface and a second tapered surface surrounded by the first tapered surface. The first and second tapered surfaces are not covered with the upper electrode layer and have respective first and second taper angles with respect to a surface of the lower electrode layer. The second taper angle is smaller than the first taper angle.

Abstract: An electronic component includes conductor layers and insulating resin layers which are alternately stacked on a substrate. One of the insulating resin layers positioned in the lowermost layer is smaller in thickness than the insulating resin layers, and the insulating resin layers are smaller in thermal expansion coefficient than the one of the insulating resin layers. Thus, an element that requires high processing accuracy, such as a capacitor, can be embedded in the insulating resin layer positioned in the lowermost layer and having a small thickness, and an element that requires a sufficient conductor thickness, such as an inductor, can be embedded in the insulating resin layers having a large thickness. In addition, since the insulating resin layers each have a small thermal expansion coefficient, the occurrence of warpage and peeling can be suppressed.

Abstract: Disclosed herein a thin film capacitor that includes a lower electrode layer, an upper electrode layer, and a dielectric layer disposed between the lower electrode layer and the upper electrode layer. The dielectric layer has a through hole. The upper electrode layer has a connection part connected to the lower electrode layer through the through hole and an electrode part insulated from the connection part by a slit. A surface of the lower electrode layer that contacts the connection part through the through hole includes an annular area positioned along an inner wall surface of the through hole and a center area surrounded by the annular area. The annular area is lower in surface roughness than the center area.

Abstract: Disclosed herein a thin film capacitor that includes a lower electrode layer, an upper electrode layer, and a dielectric layer disposed between the lower electrode layer and the upper electrode layer. The dielectric layer has a through hole. An inner wall surface of the through hole has a first tapered surface and a second tapered surface surrounded by the first tapered surface. The first and second tapered surfaces are not covered with the upper electrode layer and have respective first and second taper angles with respect to a surface of the lower electrode layer. The second taper angle is smaller than the first taper angle.

Abstract: Disclosed herein a thin film capacitor that includes a lower electrode layer, an upper electrode layer, and a dielectric layer disposed between the lower electrode layer and the upper electrode layer. The dielectric layer has a through hole. The upper electrode layer has a connection part connected to the lower electrode layer through the through hole and an electrode part insulated from the connection part by a slit. A surface of the lower electrode layer that contacts the connection part through the through hole includes an annular area positioned along an inner wall surface of the through hole and a center area surrounded by the annular area. The annular area is lower in surface roughness than the center area.

Abstract: Disclosed herein is a thin film capacitor that includes a lower electrode layer, an upper electrode layer, and a dielectric layer positioned between the lower electrode layer and the upper electrode layer. The upper electrode layer has a first capacitive electrode part opposed to the lower electrode layer through the dielectric layer without being connected to the lower electrode layer and a fiducial mark part penetrating the dielectric layer to be connected to the lower electrode layer.