Abstract: A semiconductor device, such as a GaAs FET, has low-noise, ultra-high frequency operation. The semiconductor device has at least one bonding pad for applying potential to the gate electrode lying outside of the source region. In practice, one or more bonding pads are deposited in the general vicinity of the gate electrode and outside of the source region. This allows the number of supply points P to be increased without lengthening the source region and thus expanding the chip. With regard to the drain-gate capacitance, the bonding pad or pads can be surrounded by an electrode other than the drain region electrode or the gate electrode to ensure that the drain-gate capacitance is not increased.

Abstract: An insulated gate field effect transistor is formed of a drain region of a first conductivity type which faces both of the major surfaces of a semiconductor substrate, a frame region of a second conductivity type which faces the one major surface of the semiconductor substrate, a base region of the second conductivity type which faces the one major surface and is connected to the frame region, a PN junction being formed between the base region and the drain region, and a source region of the first conductivity type which faces the one major surface and is formed in the base region as if being surrounded thereby.The insulated gate field effect transistor is also provided with a source electrode which short-circuits the frame region and the source region, a drain electrode which is provided on the drain region facing the other major surface of the substrate, and a gate electrode which is provided on the base region facing the one major surface through a gate insulating layer.

Abstract: A junction gated field effect transistor having a substrate providing a drain region of low impurity concentration, a mosaic shaped gate region of high impurity concentration formed on the drain region, a corresponding mosaic shaped insulating layer overlying said mosaic shaped gate region but having windows therein smaller than the windows of the gate region, the windows of the insulating layer being aligned with the windows of the gate region, a gate electrode connected to said mosaic shaped gate region, a plurality of source regions of high impurity concentration formed on the substrate in the openings of the mesh forming the insulating layer, and a conductive plate source electrode overlying said insulating layer and in contact with said source regions.

Abstract: A multi-channel junction gated field effect transistor which gives good triode characteristics is formed on a substrate of semiconductor material of relatively low impurity concentration of a first conductivity type. A mosaic shape semiconductor gate region of the opposite conductivity type is formed in the substrate below one major surface thereof, the mosaic shape of the gate region forming a plurality of windows filled with portions of the substrate which thus provide channels leading to the main body of the substrate, the main body of the substrate providing the drain region for the transistor. A corresponding relatively thick mosaic shape insulating layer overlies the mosaic shape gate region has a plurality of windows, which windows are smaller than the windows of the gate region and of the same configuration, the windows of the insulating layer being aligned with the windows of the gate region.