Patents by Inventor Akiyoshi Tachikawa

Akiyoshi Tachikawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7208043
    Abstract: A silicon semiconductor substrate has a structure possessing oxygen precipitate defects fated to form gettering sites in a high density directly below the defect-free region of void type crystals. The silicon semiconductor substrate is formed by heat-treating a silicon semiconductor substrate derived from a silicon single crystal grown by the Czochralski method or the magnetic field-applied Czochralski method and characterized by satisfying the relational expression (Oi DZ)?(COP DZ)?10 ?m wherein Oi DZ denotes a defect-free zone of oxygen precipitate crystal defects and COP DZ denotes a region devoid of a void type defect measuring not less than 0.11 ?m in size, and having not less than 5×108 oxygen precipitate crystal defects per cm3.
    Type: Grant
    Filed: September 6, 2002
    Date of Patent: April 24, 2007
    Assignee: Siltronic AG
    Inventors: Akiyoshi Tachikawa, Atsushi Ikari
  • Patent number: 6805742
    Abstract: A semiconductor substrate after heat-treatment in a non-oxidising atmosphere has the characteristics that the depth of the denuded zone may be greater than 12 &mgr;m or the defect-free depth of the void type defect is greater than 12 &mgr;m and the substrate has a locally densified portion produced by nitrogen segregation and exhibiting a signal strength two or more times the average signal strength at the depth of 12 &mgr;m or more below the surface thereof when measuring the concentration of nitrogen by using secondary ion mass-spectroscopy, and the density of the crystal defect of oxygen precipitates is 5×108/cm3 or more, and the said substrate is produced by heat-treating for at least one hour at the temperature of 1200° C. or more in a non-oxidising atmosphere.
    Type: Grant
    Filed: August 7, 2002
    Date of Patent: October 19, 2004
    Assignee: Siltronic AG
    Inventors: Akiyoshi Tachikawa, Kazunori Ishisaka, Atsushi Ikari
  • Patent number: 6767848
    Abstract: A silicon semiconductor substrate which realizes a defect-free region of void type crystals to a greater depth and allows the duration of production to be decreased and a method for the production thereof are provided. A silicon semiconductor substrate derived from a silicon single crystal grown by the Czochralski method or the magnetic field-applied Czochralski method, which is obtainable by using a silicon semiconductor substrate satisfying the relational expression, 0.2≧V/S/R, providing V denotes the volume of void type defects, S denotes the surface area thereof, and R denotes the radius of spherical defects presumed to have the same volume as the void defects having the volume of V, and heat treating this substrate at a temperature exceeding 1150° C.
    Type: Grant
    Filed: September 11, 2002
    Date of Patent: July 27, 2004
    Assignee: Wacker Siltronic Gesellschaft Für Halbleiter Materialien AG
    Inventors: Akiyoshi Tachikawa, Kazunori Ishisaka
  • Publication number: 20030134520
    Abstract: A silicon semiconductor substrate which realises a defect-free region of void type crystals to a greater depth and allows the duration of production to be decreased and a method for the production thereof are provided.
    Type: Application
    Filed: September 11, 2002
    Publication date: July 17, 2003
    Applicant: WACKER SILTRONIC GESELLSCHAFT FUR HALBLEITERMATERIALIEN AG
    Inventors: Akiyoshi Tachikawa, Kazunori Ishisaka
  • Publication number: 20030079674
    Abstract: A semiconductor substrate after heat-treatment in a non-oxidising atmosphere has the characteristics that the depth of the denuded zone may be greater than 12 &mgr;m or the defect-free depth of the void type defect is greater than 12 &mgr;m and the substrate has a locally densified portion produced by nitrogen segregation and exhibiting a signal strength two or more times the average signal strength at the depth of 12 &mgr;m or more below the surface thereof when measuring the concentration of nitrogen by using secondary ion mass-spectroscopy, and the density of the crystal defect of oxygen precipitates is 5×108/cm3 or more, and the said substrate is produced by heat-treating for at least one hour at the temperature of 1200° C. or more in a non-oxidising atmosphere.
    Type: Application
    Filed: August 7, 2002
    Publication date: May 1, 2003
    Applicant: Wacker Siltronic Gesellschaft Fur Halbleitermaterialien AG
    Inventors: Akiyoshi Tachikawa, Kazunori Ishisaka, Atsushi Ikari
  • Publication number: 20030056715
    Abstract: A silicon semiconductor substrate has a structure possessing oxygen precipitate defects fated to form gettering sites in a high density directly below the defect-free region of void type crystals. The silicon semiconductor substrate is formed by heat-treating a silicon semiconductor substrate derived from a silicon single crystal grown by the Czochralski method or the magnetic field-applied Czochralski method and characterized by satisfying the relational expression (Oi DZ)−(COP DZ)≦10 &mgr;m wherein Oi DZ denotes a defect-free zone of oxygen precipitate crystal defects and COP DZ denotes a region devoid of a void type defect measuring not less than 0.11 &mgr;m in size, and having not less than 5×108 oxygen precipitate crystal defects per cm3.
    Type: Application
    Filed: September 6, 2002
    Publication date: March 27, 2003
    Applicant: Wacker Siltronic Gesellschaft Fur Halbleitermaterialien AG
    Inventors: Akiyoshi Tachikawa, Atsushi Ikari
  • Patent number: 5833749
    Abstract: A compound semiconductor substrate having at least one compound semiconductor layer epitaxially grown on a silicon single crystal substrate, wherein the silicon single crystal substrate has a surface on which the compound semiconductor layer is epitaxially grown, the surface being inclined at an off angle of not more than 1 deg to a (100) plane of silicon crystal; and the compound semiconductor layer has a free or top surface having a roughness of 3 nm or less in terms of a mean square roughness, Rms, determined by an atomic force microscopic measurement in a view field area of 10 .mu.m.times.10 .mu.m or a roughness of 10.5 nm or less in terms of a maximum height difference, Ry.
    Type: Grant
    Filed: January 16, 1996
    Date of Patent: November 10, 1998
    Assignee: Nippon Steel Corporation
    Inventors: Akihiro Moritani, Aiji Yabe, Akiyoshi Tachikawa, Takashi Aigo
  • Patent number: 5438951
    Abstract: A technique of heteroepitaxially growing compound semiconductor on a silicon wafer, which can simplify the growth sequence, and improve the productivity and the surface morphology of a growth film. In growing compound semiconductor on a silicon wafer, the growth sequence such as shown in FIG. 1 is used. A necessary thin buffer layer is continuously grown at the temperature raising period up to the crystal growth temperature. Therefore, an independent process of growing a buffer layer at a lower temperature is not necessary, and the surface morphology is also improved by this method of growing compound semiconductor on a silicon wafer.
    Type: Grant
    Filed: December 20, 1993
    Date of Patent: August 8, 1995
    Assignee: Nippon Steel Corporation
    Inventors: Akiyoshi Tachikawa, Aiji Jono, Takashi Aigo, Akihiro Moritani