Abstract: According to an embodiment, a circuit in a semiconductor memory device sets threshold voltages of a plurality of memory cells such that two first distributions are formed in a first section on a lowest voltage side in 2N sections. After that, the circuit sets threshold voltages of the plurality of memory cells such that 2(1+M) second distributions are separately formed two by two. The circuit then sets 2N third distributions for the 2N sections.

Abstract: According to an embodiment, a circuit in a semiconductor memory device sets threshold voltages of a plurality of memory cells such that two first distributions are formed in a first section on a lowest voltage side in 2N sections. After that, the circuit sets threshold voltages of the plurality of memory cells such that 2(1+M) second distributions are separately formed two by two. The circuit then sets 2N third distributions for the 2N sections.

Abstract: A semiconductor memory device includes first and second memory string including first and second memory cell, respectively, and first and second bit line connected to first and second memory string, respectively. In a first program operation, a first bit line voltage is supplied to the first and the second bit line. In a second program operation, a second bit line voltage larger than the first bit line voltage or a third bit line voltage larger than the second bit line voltage is supplied to the first and the second bit line. In a third program operation, the second and the third bit line voltage is supplied to the first and the second bit line, respectively. In a fourth program operation, the third and the second bit line voltage is supplied to the first and the second bit line, respectively.

Abstract: A semiconductor memory device includes first and second memory string including first and second memory cell, respectively, and first and second bit line connected to first and second memory string, respectively. In a first program operation, a first bit line voltage is supplied to the first and the second bit line. In a second program operation, a second bit line voltage larger than the first bit line voltage or a third bit line voltage larger than the second bit line voltage is supplied to the first and the second bit line. In a third program operation, the second and the third bit line voltage is supplied to the first and the second bit line, respectively. In a fourth program operation, the third and the second bit line voltage is supplied to the first and the second bit line, respectively.

Abstract: According to one embodiment, a magnetic storage device includes: a magnetoresistive effect element including a non-magnet, and a stacked structure on the non-magnet, the stacked structure including: a first ferromagnet on the non-magnet; an anti-ferromagnet being exchange-coupled with the first ferromagnet; and a second ferromagnet between the first ferromagnet and the anti-ferromagnet. The stacked structure is configured to: have a first resistance value in response to a first current flowing through the stacked structure in a first direction, and have a second resistance value different from the first resistance value in response to a second current flowing through the stacked structure in a second direction opposite to the first direction.

Abstract: According to one embodiment, a storage device includes a magnetoresistive effect element comprising a nonmagnetic layer and a stacked body on the nonmagnetic layer. The stacked body includes a first ferromagnetic layer on the nonmagnetic layer, a second ferromagnetic layer exchange-coupled with the first ferromagnetic layer, and a magnetic layer between the first ferromagnetic layer and the second ferromagnetic layer. The magnetic layer includes a magnetic material and at least one compound selected from among a carbide, a nitride, and a boride.

Abstract: According to one embodiment, a magnetic memory device includes a semiconductor substrate, a first lower area provided on the semiconductor substrate, and including a plurality of magnetoresistive effect elements, a second lower area provided on the semiconductor substrate, and being adjacent to the first lower area, a first upper area provided above the first lower area, and including a first material film formed of an insulating material or a semiconductor material, and a second upper area provided above the second lower area, being adjacent to the first upper area, and including a second material film formed of an insulating material different from a material of the first material film.

Abstract: A magnetoresistive element according to an embodiment includes: a first layer; a first magnetic layer; a second magnetic layer disposed between the first layer and the first magnetic layer; a nonmagnetic layer disposed between the first magnetic layer and the second magnetic layer; and an insulating layer disposed at least on side surfaces of the nonmagnetic layer, the first layer including: at least one element selected from a first group consisting of Hf, Zr, Al, Cr, and Mg; and at least one element selected from a second group consisting of Ta, W, Mo, Nb, Si, Ge, Be, Li, Sn, Sb, and P, and the insulating layer including at least one element selected from the first group.

Abstract: According to one embodiment, a storage device includes a magnetoresistive effect element comprising a nonmagnetic layer and a stacked body on the nonmagnetic layer. The stacked body includes a first ferromagnetic layer on the nonmagnetic layer, a second ferromagnetic layer exchange-coupled with the first ferromagnetic layer, and a magnetic layer between the first ferromagnetic layer and the second ferromagnetic layer. The magnetic layer includes a magnetic material and at least one compound selected from among a carbide, a nitride, and a boride.

Abstract: According to one embodiment, a magnetic storage device includes: a magnetoresistive effect element including a non-magnet, and a stacked structure on the non-magnet, the stacked structure including: a first ferromagnet on the non-magnet; an anti-ferromagnet being exchange-coupled with the first ferromagnet; and a second ferromagnet between the first ferromagnet and the anti-ferromagnet. The stacked structure is configured to: have a first resistance value in response to a first current flowing through the stacked structure in a first direction, and have a second resistance value different from the first resistance value in response to a second current flowing through the stacked structure in a second direction opposite to the first direction.

Abstract: According to one embodiment, a magnetic memory device includes a conductive underlayer having an amorphous structure and containing at least one first predetermined element selected from molybdenum (Mo), magnesium (Mg), rhenium (Re), tungsten (W), vanadium (V), and manganese (Mn), and a stacked structure provided on the underlayer, and including a first magnetic layer having a variable magnetization direction, a second magnetic layer having a fixed magnetization direction, and a nonmagnetic layer provided between the first magnetic layer and the second magnetic layer.

Abstract: According to one embodiment, a magnetic memory device includes a conductive underlayer having an amorphous structure and containing at least one first predetermined element selected from molybdenum (Mo), magnesium (Mg), rhenium (Re), tungsten (W), vanadium (V), and manganese (Mn), and a stacked structure provided on the underlayer, and including a first magnetic layer having a variable magnetization direction, a second magnetic layer having a fixed magnetization direction, and a nonmagnetic layer provided between the first magnetic layer and the second magnetic layer.

Abstract: A magnetic memory according to an embodiment includes: a first magnetic layer; a second magnetic layer; a first nonmagnetic layer disposed between the first magnetic layer and the second magnetic layer; a third magnetic layer disposed between the first magnetic layer and the first nonmagnetic layer; and a first layer disposed between the first magnetic layer and the third magnetic layer, wherein the first layer contains at least one element selected from the group consisting of Co, Fe, Ni, and Mn, and at least one element selected from the group consisting of Ta, Mo, Zr, Nb, Hf, V, Ti, Sc, and La.

Abstract: A magnetoresistive element according to an embodiment includes: a first layer; a first magnetic layer; a second magnetic layer disposed between the first layer and the first magnetic layer; a nonmagnetic layer disposed between the first magnetic layer and the second magnetic layer; and an insulating layer disposed at least on side surfaces of the nonmagnetic layer, the first layer including: at least one element selected from a first group consisting of Hf, Zr, Al, Cr, and Mg; and at least one element selected from a second group consisting of Ta, W, Mo, Nb, Si, Ge, Be, Li, Sn, Sb, and P, and the insulating layer including at least one element selected from the first group.

Abstract: A magnetic memory according to an embodiment includes: a first magnetic layer; a second magnetic layer; a first nonmagnetic layer disposed between the first magnetic layer and the second magnetic layer; a third magnetic layer disposed between the first magnetic layer and the first nonmagnetic layer; and a first layer disposed between the first magnetic layer and the third magnetic layer, wherein the first layer contains at least one element selected from the group consisting of Co, Fe, Ni, and Mn, and at least one element selected from the group consisting of Ta, Mo, Zr, Nb, Hf, V, Ti, Sc, and La.

Abstract: A magnetoresistive element according to an embodiment includes: a first nonmagnetic layer; a first magnetic layer; a second magnetic layer disposed between the first nonmagnetic layer and the first magnetic layer; a second nonmagnetic layer disposed between the first magnetic layer and the second magnetic layer; a third nonmagnetic layer disposed between the second nonmagnetic layer and the second magnetic layer; and a third magnetic layer disposed between the second nonmagnetic layer and the third nonmagnetic layer, wherein elements constituting the second magnetic layer at least partially differ from elements constituting the third magnetic layer, a relative permittivity of the first nonmagnetic layer is at least 10, and the third nonmagnetic layer contains at least one element selected from the group consisting of Nb, Ta, Mo, W, Hf, Zr, Ti, Sc, V, Cr, Mn, Fe, Co, Ni, Mg, Al, Ru, Ir, Rh, Pd, Pt, Cu, Ag, and Au.

Abstract: A magnetoresistive element according to an embodiment includes: a first layer; a first magnetic layer; a second magnetic layer disposed between the first layer and the first magnetic layer; a nonmagnetic layer disposed between the first magnetic layer and the second magnetic layer; and an insulating layer disposed at least on side surfaces of the nonmagnetic layer, the first layer including: at least one element selected from a first group consisting of Hf, Zr, Al, Cr, and Mg; and at least one element selected from a second group consisting of Ta, W, Mo, Nb, Si, Ge, Be, Li, Sn, Sb, and P, and the insulating layer including at least one element selected from the first group.

Abstract: According to one embodiment, a magnetic memory device includes a semiconductor substrate, a first lower area provided on the semiconductor substrate, and including a plurality of magnetoresistive effect elements, a second lower area provided on the semiconductor substrate, and being adjacent to the first lower area, a first upper area provided above the first lower area, and including a first material film formed of an insulating material or a semiconductor material, and a second upper area provided above the second lower area, being adjacent to the first upper area, and including a second material film formed of an insulating material different from a material of the first material film.

Abstract: According to one embodiment, a magnetic memory device includes a first interconnect, a second interconnect, a magnetoresistive effect element having first and second terminals, the first terminal being electrically connected to the first interconnect, a diode having first and second terminals, the first terminal being electrically connected to the first terminal of the magnetoresistive effect element, the second terminal being electrically connected to the second terminal of the magnetoresistive effect element, and a transistor having source and drain terminals, one of the source and drain terminals being electrically connected to the second terminal of the magnetoresistive effect element and the second terminal of the diode, the other of the source and drain terminals being electrically connected to the second interconnect.

Abstract: According to one embodiment, a manufacturing method of a magnetic memory device, includes obtaining first and second magnetic fields for each of magnetoresistive effect elements, defining a group of the elements, for the first and second magnetic fields of the elements in the group, a highest first magnetic field being lower than a lowest second magnetic field, and a difference between the highest first magnetic field and the lowest second magnetic field being greater than a predetermined difference, determining a maximum applied magnetic field higher than the highest first magnetic field and lower than the lowest second magnetic field, and obtaining magnetic characteristics for each of the elements in the group by applying a magnetic field decreasing from the maximum applied magnetic field after the magnetic field is increased up to the maximum applied magnetic field.