Patents by Inventor Akiyuki Noda
Akiyuki Noda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9674481Abstract: A first video signal having a first frame rate optionally settable is generated by an image pickup device, and the first video signal is memorized in a memory and outputted from the memory. A write control device controls the write of the first video signal with respect to the memory, and a read control device controls the read of the video signal with respect to the memory. The write control device writes respective first frame data constituting the first video signal in the memory in each cycle determined by the first frame rate of the first video signal. The read control device reads the first frame data as a second video signal. The second video signal is formed from sequentially arranging the first frame data in a partially duplicating manner in a standard video signal having a standard frame rate based on a determined arrangement rule.Type: GrantFiled: May 4, 2015Date of Patent: June 6, 2017Assignee: Panasonic Intellectual Property Management Co., Ltd.Inventors: Shinji Takemoto, Shoichi Fuse, Kazumasa Motoda, Akiyuki Noda
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Publication number: 20150237297Abstract: A first video signal having a first frame rate optionally settable is generated by an image pickup device, and the first video signal is memorized in a memory and outputted from the memory. A write control device controls the write of the first video signal with respect to the memory, and a read control device controls the read of the video signal with respect to the memory. The write control device writes respective first frame data constituting the first video signal in the memory in each cycle determined by the first frame rate of the first video signal. The read control device reads the first frame data as a second video signal. The second video signal is formed from sequentially arranging the first frame data in a partially duplicating manner in a standard video signal having a standard frame rate based on a determined arrangement rule.Type: ApplicationFiled: May 4, 2015Publication date: August 20, 2015Inventors: Shinji TAKEMOTO, Shoichi FUSE, Kazumasa MOTODA, Akiyuki NODA
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Patent number: 9055270Abstract: A first video signal having a first frame rate optionally settable is generated by an image pickup device, and the first video signal is memorized in a memory and outputted from the memory. A write control device controls the write of the first video signal with respect to the memory, and a read control device controls the read of the video signal with respect to the memory. The write control device writes respective first frame data constituting the first video signal in the memory in each cycle determined by the first frame rate of the first video signal. The read control device reads the first frame data as a second video signal. The second video signal is formed from sequentially arranging the first frame data in a partially duplicating manner in a standard video signal having a standard frame rate based on a determined arrangement rule.Type: GrantFiled: February 20, 2004Date of Patent: June 9, 2015Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.Inventors: Shinji Takemoto, Shoichi Fuse, Kazumasa Motoda, Akiyuki Noda
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Patent number: 7750973Abstract: A pickup 1 generates a video signal based on an arbitrarily set frame rate. A frame rate converter 2 converts a frame rate of the video signal output from the pickup 1 into a predetermined frame rate. Frame rate conversion information output units 6 and 4 output information on frame rate conversion in a manner corresponding to a video signal after the frame rate conversion.Type: GrantFiled: November 11, 2002Date of Patent: July 6, 2010Assignee: Panasonic CorporationInventors: Hiromi Nakase, Shinji Takemoto, Yukio Shimamura, Akiyuki Noda, Katsuyuki Taguchi
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Patent number: 7643728Abstract: A video signal recording apparatus with a video and audio memorizing section for temporarily memorizing an inputted video audio signal, a time code generating section for generating a time-code of said video audio signal an auxiliary information memorizing section for temporarily memorizing auxiliary information appended to said video audio signal including said time code generating a regeneration value obtained from a time code to which one frame time is added to said recorded time code when a recording starts and correcting said regeneration value for an amount of delay corresponding to a storage volume temporarily memorized in said auxiliary information (time code, metadata, CUE audio signal, and the like) memorizing section and thus obtaining a corrected time code, and thereafter sequential time codes are generated from said corrected time code though said time code generating section.Type: GrantFiled: January 29, 2004Date of Patent: January 5, 2010Assignee: Panasonic CorporationInventors: Akiyuki Noda, Shinji Takemoto, Hiroyuki Yamashita, Tsuneki Fujimoto
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Patent number: 7599608Abstract: An information recording apparatus comprising image signal processing units for processing image signals from an image taking unit for recording with respect a magnetic tape and a microcomputer for recording, when abnormality occurs in the recording with respect to the magnetic tape due to abnormality in the image signal processing units, information relating to the recording abnormality in a blank recording region of the magnetic tape together with actual time information.Type: GrantFiled: October 18, 2002Date of Patent: October 6, 2009Assignee: Panasonic CorporationInventors: Shinji Takemoto, Akiyuki Noda
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Patent number: 7146558Abstract: As a pre-processing step for transmitting a timecode, a checking information is retrieved from a linear time code (LTC). A checking data is created using the retrieved checking information. The checking data is superimposed on a vertical interval time code (VITC). As a post-processing step for transmitting a timecode, meanwhile, collating information corresponding to the checking information is retrieved from the LTC. A collating data is created using the retrieved collating information. Then, the checking data is retrieved from the received VITC. The retrieved checking and collating data are collated to verify, thereby, the presence or absence of errors in the received LTC.Type: GrantFiled: November 5, 2002Date of Patent: December 5, 2006Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Yukio Shimamura, Toru Yamashita, Akiyuki Noda
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Publication number: 20060165378Abstract: An inputted video audio signal is temporarily memorized in a video and audio memorizing section 310. Auxiliary information appended to the video audio signal is temporarily memorized in an auxiliary information memorizing section 320. A memory control device 620 controls write and read operations of the video audio signal with respect to the video and audio memorizing section 310 and write and read operations of the auxiliary information with respect to the auxiliary information memorizing section 320. The video audio signal read from the video and audio memorizing section 310 and the auxiliary information read from the auxiliary information memorizing section 320 are sequentially recorded on a recording medium 500 by a recording device 400.Type: ApplicationFiled: January 29, 2004Publication date: July 27, 2006Inventors: Akiyuki Noda, Shinji Takemoto, Hiroyuki Yamashita, Tsuneki Fujimoto
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Publication number: 20060147187Abstract: A first video signal having a first frame rate optionally settable is generated by an image pickup device, and the first video signal is memorized in a memory and outputted from the memory. A write control device controls the write of the first video signal with respect to the memory, and a read control device controls the read of the video signal with respect to the memory. The write control device writes respective first frame data constituting the first video signal in the memory in each cycle determined by the first frame rate of the first video signal. The read control device reads the first frame data as a second video signal. The second video signal is formed from sequentially arranging the first frame data in a partially duplicating manner in a standard video signal having a standard frame rate based on a determined arrangement rule.Type: ApplicationFiled: February 20, 2004Publication date: July 6, 2006Inventors: Shinji Takemoto, Shoichi Fuse, Kazuma Motoda, Akiyuki Noda
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Publication number: 20050036766Abstract: An information recording apparatus comprising image signal processing units for processing image signals from an image taking unit for recording with respect a magnetic tape and a microcomputer for recording, when abnormality occurs in the recording with respect to the magnetic tape due to abnormality in the image signal processing units, information relating to the recording abnormality in a blank recording region of the magnetic tape together with actual time information.Type: ApplicationFiled: October 18, 2002Publication date: February 17, 2005Inventors: Shinji Takemoto, Akiyuki Noda
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Publication number: 20040212690Abstract: A pickup 1 generates a video signal based on an arbitrarily set frame rate. A frame rate converter 2 converts a frame rate of the video signal output from the pickup 1 into a predetermined frame rate. Frame rate conversion information output units 6 and 4 output information on frame rate conversion in a manner corresponding to a video signal after the frame rate conversion.Type: ApplicationFiled: January 29, 2004Publication date: October 28, 2004Inventors: Hiromi Nakase, Shinji Takemoto, Yukio Shimamura, Akiyuki Noda, Katsuyuki Taguchi
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Publication number: 20040088625Abstract: As a pre-processing step for transmitting a timecode, a checking information is retrieved from a LTC. A checking data is created using the retrieved checking information. The checking data is superimposed on a VITC.Type: ApplicationFiled: September 2, 2003Publication date: May 6, 2004Inventors: Yukio Shimamura, Toru Yamashita, Akiyuki Noda