Patents by Inventor Akiyuki Yoshisato

Akiyuki Yoshisato has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7496332
    Abstract: A diplexer contains a common terminal connected to an antenna, a first input/output terminal for inputting/outputting signals of a plurality of high frequency bands higher than a predetermined frequency, and a second input/output terminal for inputting/outputting signals of low frequency bands lower than the predetermined frequency. Between the common terminal and the first input/output terminal, a high pass filter and low trap circuits for attenuating the low frequency bands respectively are interposed in series, and, between the common terminal and the second input/output terminal, a low pass filter and high trap circuits for attenuating the high frequency bands respectively are interposed in series.
    Type: Grant
    Filed: February 17, 2005
    Date of Patent: February 24, 2009
    Assignee: Alps Electric Co., Ltd.
    Inventors: Hiroyuki Ishiwata, Takashi Tanemura, Akiyuki Yoshisato, Masami Miyazaki
  • Publication number: 20050192047
    Abstract: A diplexer contains a common terminal connected to an antenna, a first input/output terminal for inputting/outputting signals of a plurality of high frequency bands higher than a predetermined frequency, and a second input/output terminal for inputting/outputting signals of low frequency bands lower than the predetermined frequency. Between the common terminal and the first input/output terminal, a high pass filter and a low trap circuits for attenuating the low frequency bands respectively are interposed in series, and, between the common terminal and the second input/output terminal, a low pass filter and high trap circuits for attenuating the high frequency bands respectively are interposed in series.
    Type: Application
    Filed: February 17, 2005
    Publication date: September 1, 2005
    Inventors: Hiroyuki Ishiwata, Takashi Tanemura, Akiyuki Yoshisato, Masami Miyazaki
  • Patent number: 6933587
    Abstract: The invention provides a surface mounting type electronic circuit unit that is suitable for miniaturization. Thin film circuit elements including capacitors, resistors, and inductance elements are formed on an alumina substrate, a semiconductor bare chip of a diode and a transistor is fixed by means of wire bonding, and part of the capacitors is formed non-rectangular having rectangles projected from one side of another rectangle.
    Type: Grant
    Filed: May 29, 2001
    Date of Patent: August 23, 2005
    Assignee: Alps Electric Co., Ltd.
    Inventors: Akiyuki Yoshisato, Kazuhiko Ueda, Yasuhiro Ikarashi
  • Patent number: 6714420
    Abstract: The invention provides a surface mounting type electronic circuit unit that is suitable for miniaturization and is suitable for simple output adjustment. Circuit elements including capacitors, resistors, and inductance elements and a conducting pattern connected to the circuit elements are formed on an alumina substrate by means of thin film forming technique, and a diode D1 and a semiconductor chip of a transistor are fixed to a connection land of the conducting pattern by means of wire bonding, wherein only the emitter resistor out of the base bias voltage dividing resistors and the emitter resistor of the transistor is trimmed for output adjustment.
    Type: Grant
    Filed: May 29, 2001
    Date of Patent: March 30, 2004
    Assignee: Alps Electric Co., Ltd.
    Inventors: Akiyuki Yoshisato, Kazuhiko Ueda, Yasuhiro Ikarashi, Akihiko Inoue, Hiroshi Sakuma
  • Patent number: 6700177
    Abstract: In a surface-mounting-type electronic-circuit unit, circuit elements, including capacitors, resistors, and inductive devices, and electrically conductive patterns connected to the circuit elements are formed on an alumina board as thin films. Semiconductor bare chips for a diode and a transistor are wire-bonded to connection lands in electrically conductive patterns. And end-face electrodes connected to grounding electrodes, input electrodes, and output electrodes of electrically conductive patterns are formed at side faces of the alumina board.
    Type: Grant
    Filed: May 29, 2001
    Date of Patent: March 2, 2004
    Assignee: Alps Electric Co., Ltd.
    Inventors: Akiyuki Yoshisato, Kazuhiko Ueda, Hiroshi Sakuma, Akihiko Inoue
  • Patent number: 6664862
    Abstract: An oscillator includes an oscillation circuit unit and an amplification circuit unit of the common-base type. The oscillation circuit unit includes an oscillation transistor and a resonance circuit, the collector of the oscillation transistor being grounded via a first capacitor. The amplification circuit unit includes an amplification transistor, the emitter thereof being directly connected to the collector of the oscillation transistor and the base thereof being grounded via a second capacitor. The resonance circuit is connected between the base of the oscillation transistor and the ground. An oscillation signal output from the collector of the oscillation transistor is input to the emitter of the amplification transistor while partially being bypassed to the ground via the first capacitor. Negative feedback is provided to the amplification transistor in association with the second capacitor.
    Type: Grant
    Filed: July 10, 2001
    Date of Patent: December 16, 2003
    Assignee: Alps Electric Co., Ltd.
    Inventors: Akiyuki Yoshisato, Kazuhiko Ueda, Hiroaki Kukita
  • Patent number: 6603667
    Abstract: The invention provides an electronic circuit unit that is suitable for miniaturization and excellent in high frequency characteristic. Capacitors and a wiring pattern are formed on an alumina substrate by means of thin film forming technique, and a part of the wiring pattern is served as the connection land for mounting a bare chip of a transistor. Among the capacitors, the top electrode of the capacitor is served also as a part of the connection land, and the bottom side collector electrode of the bare chip is connected to the connection land by use of conductive adhesive. Top electrodes of the residual capacitors are served as the bonding pad, and the base electrode and the emitter electrode on the top side of the bare chip are connected to the top electrodes of the respective capacitors by a wire.
    Type: Grant
    Filed: May 29, 2001
    Date of Patent: August 5, 2003
    Assignee: Alps Electric Co., Ltd.
    Inventors: Akiyuki Yoshisato, Kazuhiko Ueda, Akihiko Inoue, Hiroshi Sakuma
  • Patent number: 6518658
    Abstract: To provide a surface-mounting type electronic circuit unit suitable for miniaturization, circuit elements including capacitors, resistors and inductance elements and a conductive pattern connected to these circuit elements are thinly formed on an alumina substrate, semiconductor bare chips for a diode and a transistor are bonded on a connection land of the conductive pattern via wire, an inductance element composed of a pair of conductors opposite at a predetermined interval on the aluminum board is thinly formed and a unbalance/balance converter is formed by these conductors.
    Type: Grant
    Filed: May 29, 2001
    Date of Patent: February 11, 2003
    Assignee: Alps Electric Co., Ltd.
    Inventors: Akiyuki Yoshisato, Kazuhiko Ueda, Yasuhio Ikarashi, Akihiko Inoue, Hiroshi Sakuma
  • Publication number: 20020011596
    Abstract: The invention provides a surface mounting type electronic circuit unit that is suitable for miniaturization and is suitable for simple output adjustment. Circuit elements including capacitors, resistors, and inductance elements and a conducting pattern connected to the circuit elements are formed on an alumina substrate by means of thin film forming technique, and a diode D1 and a semiconductor chip of a transistor are fixed to a connection land of the conducting pattern by means of wire bonding, wherein only the emitter resistor out of the base bias voltage dividing resistors and the emitter resistor of the transistor is trimmed for output adjustment.
    Type: Application
    Filed: May 29, 2001
    Publication date: January 31, 2002
    Inventors: Akiyuki Yoshisato, Kazuhiko Ueda, Yasuhiro Ikarashi, Akihiko Inoue, Hiroshi Sakuma
  • Publication number: 20020011658
    Abstract: To provide a surface-mounting type electronic circuit unit suitable for miniaturization, circuit elements including capacitors, resistors and inductance elements and a conductive pattern connected to these circuit elements are thinly formed on an alumina substrate, semiconductor bare chips for a diode and a transistor are bonded on a connection land of the conductive pattern via wire, an inductance element composed of a pair of conductors opposite at a predetermined interval on the aluminum board is thinly formed and a unbalance/balance converter is formed by these conductors.
    Type: Application
    Filed: May 29, 2001
    Publication date: January 31, 2002
    Inventors: Akiyuki Yoshisato, Kazuhiko Ueda, Yasuhio Ikarashi, Akihiko Inoue, Hiroshi Sakuma
  • Publication number: 20020011352
    Abstract: The invention provides an electronic circuit unit that is suitable for miniaturization and excellent in high frequency characteristic. Capacitors and a wiring pattern are formed on an alumina substrate by means of thin film forming technique, and a part of the wiring pattern is served as the connection land for mounting a bare chip of a transistor. Among the capacitors, the top electrode of the capacitor is served also as a part of the connection land, and the bottom side collector electrode of the bare chip is connected to the connection land by use of conductive adhesive. Top electrodes of the residual capacitors are served as the bonding pad, and the base electrode and the emitter electrode on the top side of the bare chip are connected to the top electrodes of the respective capacitors by a wire.
    Type: Application
    Filed: May 29, 2001
    Publication date: January 31, 2002
    Inventors: Akiyuki Yoshisato, Kazuhiko Ueda, Akihiko Inoue, Hiroshi Sakuma
  • Publication number: 20020008238
    Abstract: The invention provides a surface mounting type electronic circuit unit that is suitable for miniaturization. Thin film circuit elements including capacitors, resistors, and inductance elements are formed on an alumina substrate, a semiconductor bare chip of a diode and a transistor is fixed by means of wire bonding, and part of the capacitors is formed non-rectangular having rectangles projected from one side of another rectangle.
    Type: Application
    Filed: May 29, 2001
    Publication date: January 24, 2002
    Inventors: Akiyuki Yoshisato, Kazuhiko Ueda, Yasuhiro Ikarashi
  • Publication number: 20020008592
    Abstract: An oscillator includes an oscillation circuit unit and an amplification circuit unit of the common-base type. The oscillation circuit unit includes an oscillation transistor and a resonance circuit, the collector of the oscillation transistor being grounded via a first capacitor. The amplification circuit unit includes an amplification transistor, the emitter thereof being directly connected to the collector of the oscillation transistor and the base thereof being grounded via a second capacitor. The resonance circuit is connected between the base of the oscillation transistor and the ground. An oscillation signal output from the collector of the oscillation transistor is input to the emitter of the amplification transistor while partially being bypassed to the ground via the first capacitor. Negative feedback is provided to the amplification transistor in association with the second capacitor.
    Type: Application
    Filed: July 10, 2001
    Publication date: January 24, 2002
    Applicant: Alps Electric Co., Ltd.
    Inventors: Akiyuki Yoshisato, Kazuhiko Ueda, Hiroaki Kukita
  • Publication number: 20010048150
    Abstract: In a surface-mounting-type electronic-circuit unit, circuit elements, including capacitors, resistors, and inductive devices, and electrically conductive patterns connected to the circuit elements are formed on an alumina board as thin films. Semiconductor bare chips for a diode and a transistor are wire-bonded to connection lands in electrically conductive patterns. And end-face electrodes connected to grounding electrodes, input electrodes, and output electrodes of electrically conductive patterns are formed at side faces of the alumina board.
    Type: Application
    Filed: May 29, 2001
    Publication date: December 6, 2001
    Applicant: Alps Electric Co., Ltd.
    Inventors: Akiyuki Yoshisato, Kazuhiko Ueda, Hiroshi Sakuma, Akihiko Inoue
  • Patent number: 4568980
    Abstract: A video clamping correction circuit for connection with a video clamping circuit for removing an energy dispersal signal in a receiver in an energy dispersal satellite communication system, comprises: a clamping circuit including a clamping capacitor and a clamping diode for producing a video output signal; and a correction circuit including a detecting resistor for detecting a clamping current flowing through the clamping diode, a first amplifier for inverting and amplifying a signal developed across the detecting resistor in proportion with the clamping current, an integrating circuit connected to an output of the first amplifier for integrating an output signal from the first amplifier, an integration correcting circuit connected to the integrating circuit for processing an integrated waveform of the output signal into approximation with a distorted waveform in the video output signal from the clamping circuit, and a circuit for adding an output signal from the integrating circuit and integration correctin
    Type: Grant
    Filed: June 3, 1983
    Date of Patent: February 4, 1986
    Assignee: Alps Electric Co., Ltd.
    Inventor: Akiyuki Yoshisato
  • Patent number: 4556988
    Abstract: Improved AFC performance is achieved in a satellite dish receiver by using an indoor unit having a first intermediate frequency (IF signal) which does not include an image frequency and by using a PLL-demodulator for controlling the AFC loop.
    Type: Grant
    Filed: September 27, 1983
    Date of Patent: December 3, 1985
    Assignee: Alps. Electric Co., Ltd.
    Inventor: Akiyuki Yoshisato
  • Patent number: 4544951
    Abstract: A video clamping circuit adapted for satellite communication includes an operational amplifier for detecting the current flowing into a diode connected to the input terminal of the buffer amplifier of the circuit. The circuit further includes rectifying and smoothing elements for deriving a DC voltage from the output from the operational amplifier and adding the DC voltage to the signal of the output stage of the buffer amplifier in an anti-phase relation, so that an energy dispersal signal superimposed on a video signal is removed and waveform distortion is minimized.
    Type: Grant
    Filed: April 12, 1983
    Date of Patent: October 1, 1985
    Assignee: Alps Electric Co., Ltd.
    Inventor: Akiyuki Yoshisato
  • Patent number: 4535435
    Abstract: A capacitance detector for detecting a capacitance variation from a video disk and demodulating the capacitance variation into an electric signal, comprises a first block which includes a fixed oscillator, and a coupling loop comprised of a coupling coil and a coupling capacitor, the inductance of the fixed oscillator being inductively coupled with the coupling loop; and a second block which includes a disk stylus resonator having its resonance frequency varied by the capacitance variation of the video disk. A shield plate separates the first block from the second block and a coupling window is provided which inductively couples the coupling loop with the resonant inductance of the disk stylus resonator.
    Type: Grant
    Filed: June 29, 1982
    Date of Patent: August 13, 1985
    Assignee: Alps Electric Co., Ltd.
    Inventors: Akiyuki Yoshisato, Kohta Iijima
  • Patent number: 4479091
    Abstract: In an FM demodulation circuit which demodulates an FM signal by the use of a phase-lock loop constructed of a phase comparator, a loop filter and a voltage-controlled oscillator, the loop filter is a variable loop filter whose loop band width is varied in correspondence with the modulation band width and the carrier/noise ratio of the input signal by a base band processing circuit.
    Type: Grant
    Filed: December 3, 1981
    Date of Patent: October 23, 1984
    Assignee: Alps Electric Co., Ltd.
    Inventor: Akiyuki Yoshisato
  • Patent number: 4426627
    Abstract: A phase-locked loop oscillator circuit having a reference signal generator, a voltage-controlled oscillator and a phase comparator comprises a second phase comparator. The first phase comparator is supplied with an output of the reference signal generator whose frequency has been lowered and also an output of the voltage-controlled oscillator whose frequency has been lowered. The second phase comparator is supplied with a signal which has been derived from an intermediate position of a higher-frequency path extending from the reference signal generator to the first phase comparator and also a higher-frequency signal which has been derived from an intermediate position of a path extending from the voltage-controlled oscillator to the first phase comparator. Outputs of the first and second phase comparators are added and applied to the voltage-controlled oscillator to reduce residual FM noise.
    Type: Grant
    Filed: May 11, 1981
    Date of Patent: January 17, 1984
    Assignee: Alps Electric Co., Ltd.
    Inventors: Akiyuki Yoshisato, Sadao Igarashi