Abstract: A system for distributing firmware, comprising a group controller operating on a processor and configured to perform an algorithmic process of sending an update task with a download host to one of two or more group members. A group member operating on a processor and configured to perform an algorithmic process of receiving the update task with the download host and to request a payload file from the download host.

Abstract: An information handling system includes a data handling device and a baseboard management controller (BMC). The data handling device includes a co-processor configured to instantiate a device operating system for the data handling device. The data handling device includes a Management Component Transport Protocol (MCTP) endpoint. The BMC establishes a serial terminal session with the device operating system via the MCTP endpoint.

Abstract: An information handling system includes a data handling device and a baseboard management controller (BMC). The data handling device includes a co-processor configured to instantiate a device operating system for the data handling device. The data handling device includes a Management Component Transport Protocol (MCTP) endpoint. The BMC establishes a serial terminal session with the device operating system via the MCTP endpoint.

Abstract: A system for distributing firmware, comprising a group controller operating on a processor and configured to perform an algorithmic process of sending an update task with a download host to one of two or more group members. A group member operating on a processor and configured to perform an algorithmic process of receiving the update task with the download host and to request a payload file from the download host.

Abstract: A system for distributing firmware, comprising a group controller operating on a processor and configured to perform an algorithmic process of sending an update task with a download host to one of two or more group members. A group member operating on a processor and configured to perform an algorithmic process of receiving the update task with the download host and to request a payload file from the download host.

Abstract: An information handling system includes a device, a processor, and a runtime agent. the device provides a System Management Interrupt (SMI) in response to an error on the device. The processor receives the SMI, enters a System Management Mode (SMM), and executes first interrupt handler code in SMM to provide interrupt information associated with the SMI when the SMI is associated with a non-critical error on the device, and exit SMM to a runtime mode. The runtime agent receives the interrupt information during the runtime mode to execute second interrupt handler code to service the non-critical error on the device.

Abstract: An information handling system includes a device, a processor, and a runtime agent. the device provides a System Management Interrupt (SMI) in response to an error on the device. The processor receives the SMI, enters a System Management Mode (SMM), and executes first interrupt handler code in SMM to provide interrupt information associated with the SMI when the SMI is associated with a non-critical error on the device, and exit SMM to a runtime mode. The runtime agent receives the interrupt information during the runtime mode to execute second interrupt handler code to service the non-critical error on the device.

Abstract: An information handling system includes a first graphics processing unit (GPU) with a first high-speed interface, a second GPU with a second high-speed interface coupled to the first high-speed interface, and a baseboard management controller (BMC). The first GPU is configured to receive a command to provide management data to the BMC, and to provide first management data associated with the first GPU to the first GPU via the first high-speed interface in response to receiving the command. The second GPU is configured to receive the command, to receive the first management data via the second high-speed interface in response to receiving the command, and to provide the first management data and second management data associated with the second GPU to the BMC in further response to the command.

Abstract: An information handling system includes a first graphics processing unit (GPU) with a first high-speed interface, a second GPU with a second high-speed interface coupled to the first high-speed interface, and a baseboard management controller (BMC). The first GPU is configured to receive a command to provide management data to the BMC, and to provide first management data associated with the first GPU to the first GPU via the first high-speed interface in response to receiving the command. The second GPU is configured to receive the command, to receive the first management data via the second high-speed interface in response to receiving the command, and to provide the first management data and second management data associated with the second GPU to the BMC in further response to the command.

Abstract: A system for distributing firmware, comprising a group controller operating on a processor and configured to perform an algorithmic process of sending an update task with a download host to one of two or more group members. A group member operating on a processor and configured to perform an algorithmic process of receiving the update task with the download host and to request a payload file from the download host.

Abstract: An information handling system includes a processor, a graphics processing unit (GPU) including an interrupt interface coupled to the processor, and a low-speed interface, and a baseboard management controller (BMC) coupled to the low-speed interface. The GPU is configured to receive a first command from the BMC via the low-speed interface to halt processing data, to send a first interrupt to the processor via the interrupt interface in response to receiving the first command, to determine that the processor has halted sending data to the first GPU in response to the first interrupt, and to send a first reply to the command in response to determining that the processor has halted sending data. The BMC is configured to reboot the first GPU without rebooting the processor in response to receiving the first reply.

Abstract: Systems and methods for providing instant-on functionality on an embedded controller are disclosed. A method of providing instant-on functionality on a controller comprises an initial state, an intermediate state and a final state. The initial state comprises installing a first responder code, enabling the first responder code and enabling a timer interrupt service routine. The intermediate state comprises registering the first responder code as a timer interrupt service routine. The timer interrupt service routine initiates periodic processing. The final state comprises registering a steady-state interrupt service routine.

Abstract: Systems and methods for providing instant-on functionality on an embedded controller are disclosed. A method of providing instant-on functionality on a controller comprises an initial state, an intermediate state and a final state. The initial state comprises installing a first responder code, enabling the first responder code and enabling a timer interrupt service routine. The intermediate state comprises registering the first responder code as a timer interrupt service routine. The timer interrupt service routine initiates periodic processing. The final state comprises registering a steady-state interrupt service routine.

Abstract: An information handling system includes modular processing resources, each having a main processor, system memory, and preferably a service processor resource. A management resource coupled to a service processor resource evaluates a system power budget and allocates power to a processing resource by indicating a critical power level. The processing resource determines a warning power level based on the critical power level and monitor its actual power consumption. If actual power consumption exceeds the critical power level, the processing resource is powered down. If actual power consumption exceeds the warning power level, the processing resource throttles its performance to conserve power and requests a power allocation increase. If actual power consumption is below the warning power level, the processing resource may request a reduction in allocated power.

Abstract: An information handling system includes modular processing resources, each having a main processor, system memory, and preferably a service processor resource. A management resource coupled to a service processor resource evaluates a system power budget and allocates power to a processing resource by indicating a critical power level. The processing resource determines a warning power level based on the critical power level and monitor its actual power consumption. If actual power consumption exceeds the critical power level, the processing resource is powered down. If actual power consumption exceeds the warning power level, the processing resource throttles its performance to conserve power and requests a power allocation increase. If actual power consumption is below the warning power level, the processing resource may request a reduction in allocated power.

Abstract: In accordance with the present disclosure, a method and system for logging recoverable errors in an information handling system is disclosed. The system includes a central processing unit, a chipset coupled to the central processing unit, and at least one chipset memory unit coupled to and associated with the chipset. The system also includes a Baseboard Management Controller (BMC), and a memory unit containing a Basic Input Output System (BIOS). A System Management Interrupt (SMI) is periodically invoked. A status register is scanned to detect whether a recoverable error has occurred. If a recoverable error is detected, the system logs the recoverable error in a memory unit associated with the baseboard management controller. The system logs information that indicates a source of the recoverable error and that source's location. If no recoverable errors are detected, the system transmits a communication indicating that no recoverable errors have occurred.

Abstract: A system and method is disclosed in which the buses of a server computer are monitored through server management software. A data structure for a monitored bus or group of buses is created and stored in a repository of data structures for other monitored devices within the server computer. As events, such as failure events, occur on one or more of the monitored buses, the event is recorded in an event log. Using the server management software, monitoring commands can be issued by the baseboard management controller to each monitored bus to check the status of the bus.

Abstract: An escape sequence coded in power commands from a system controller, such as a BMC, to a cooling fan controller directs the cooling fan to send identification information coded in tachometer readings to the system controller for use by an information handling system. Electronic confirmation of the cooling fan identification ensures compatibility of the information handling system and cooling fan at initial manufacture or subsequent repair. Communication of information over existing power and tachometer wires supports the electronic confirmation without adding additional communication lines. Further, once a communication link is established between an information handling system controller and a cooling fan, other functions are enabled, such as a reflash of the cooling fan controller firmware.