Patents by Inventor Akram Ditali
Akram Ditali has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8963331Abstract: Some embodiments include semiconductor processing methods in which a copper barrier is formed to be laterally offset from a copper component, and in which nickel is formed to extend across both the barrier and the component. The barrier may extend around an entire lateral periphery of the component, and may be spaced from the component by an intervening ring of electrically insulative material. The copper component may be a bond pad or an interconnect between two levels of metal layers. Some embodiments include semiconductor constructions in which nickel extends across a copper component, a copper barrier is laterally offset from the copper component, and an insulative material is between the copper barrier and the copper component.Type: GrantFiled: April 30, 2014Date of Patent: February 24, 2015Assignee: Micron Technology, Inc.Inventors: Tianhong Zhang, Akram Ditali
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Publication number: 20140232003Abstract: Some embodiments include semiconductor processing methods in which a copper barrier is formed to be laterally offset from a copper component, and in which nickel is formed to extend across both the barrier and the component. The barrier may extend around an entire lateral periphery of the component, and may be spaced from the component by an intervening ring of electrically insulative material. The copper component may be a bond pad or an interconnect between two levels of metal layers. Some embodiments include semiconductor constructions in which nickel extends across a copper component, a copper barrier is laterally offset from the copper component, and an insulative material is between the copper barrier and the copper component.Type: ApplicationFiled: April 30, 2014Publication date: August 21, 2014Applicant: Micron Technology, Inc.Inventors: Tianhong Zhang, Akram Ditali
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Patent number: 8749066Abstract: Some embodiments include semiconductor processing methods in which a copper barrier is formed to be laterally offset from a copper component, and in which nickel is formed to extend across both the barrier and the component. The barrier may extend around an entire lateral periphery of the component, and may be spaced from the component by an intervening ring of electrically insulative material. The copper component may be a bond pad or an interconnect between two levels of metal layers. Some embodiments include semiconductor constructions in which nickel extends across a copper component, a copper barrier is laterally offset from the copper component, and an insulative material is between the copper barrier and the copper component.Type: GrantFiled: September 13, 2012Date of Patent: June 10, 2014Assignee: Micron Technology, Inc.Inventors: Tianhong Zhang, Akram Ditali
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Publication number: 20130001788Abstract: Some embodiments include semiconductor processing methods in which a copper barrier is formed to be laterally offset from a copper component, and in which nickel is formed to extend across both the barrier and the component. The barrier may extend around an entire lateral periphery of the component, and may be spaced from the component by an intervening ring of electrically insulative material. The copper component may be a bond pad or an interconnect between two levels of metal layers. Some embodiments include semiconductor constructions in which nickel extends across a copper component, a copper barrier is laterally offset from the copper component, and an insulative material is between the copper barrier and the copper component.Type: ApplicationFiled: September 13, 2012Publication date: January 3, 2013Applicant: MICRON TECHNOLOGY, INC.Inventors: Tianhong Zhang, Akram Ditali
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Publication number: 20100230819Abstract: Some embodiments include semiconductor processing methods in which a copper barrier is formed to be laterally offset from a copper component, and in which nickel is formed to extend across both the barrier and the component. The barrier may extend around an entire lateral periphery of the component, and may be spaced from the component by an intervening ring of electrically insulative material. The copper component may be a bond pad or an interconnect between two levels of metal layers. Some embodiments include semiconductor constructions in which nickel extends across a copper component, a copper barrier is laterally offset from the copper component, and an insulative material is between the copper barrier and the copper component.Type: ApplicationFiled: May 21, 2010Publication date: September 16, 2010Applicant: MICRON TECHNOLOGY, INC.Inventors: Tianhong Zhang, Akram Ditali
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Patent number: 7749885Abstract: Some embodiments include semiconductor processing methods in which a copper barrier is formed to be laterally offset from a copper component, and in which nickel is formed to extend across both the barrier and the component. The barrier may extend around an entire lateral periphery of the component, and may be spaced from the component by an intervening ring of electrically insulative material. The copper component may be a bond pad or an interconnect between two levels of metal layers. Some embodiments include semiconductor constructions in which nickel extends across a copper component, a copper barrier is laterally offset from the copper component, and an insulative material is between the copper barrier and the copper component.Type: GrantFiled: December 15, 2006Date of Patent: July 6, 2010Assignee: Micron Technology, Inc.Inventors: Tianhong Zhang, Akram Ditali
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Publication number: 20080142982Abstract: Some embodiments include semiconductor processing methods in which a copper barrier is formed to be laterally offset from a copper component, and in which nickel is formed to extend across both the barrier and the component. The barrier may extend around an entire lateral periphery of the component, and may be spaced from the component by an intervening ring of electrically insulative material. The copper component may be a bond pad or an interconnect between two levels of metal layers. Some embodiments include semiconductor constructions in which nickel extends across a copper component, a copper barrier is laterally offset from the copper component, and an insulative material is between the copper barrier and the copper component.Type: ApplicationFiled: December 15, 2006Publication date: June 19, 2008Inventors: Tianhong Zhang, Akram Ditali
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Patent number: 7189623Abstract: A method of forming a transistor gate includes forming a gate oxide layer over a semiconductive substrate. Chlorine is provided within the gate oxide layer. A gate is formed proximate the gate oxide layer. In another method, a gate and a gate oxide layer are formed in overlapping relation, with the gate having opposing edges and a center therebetween. At least one of chlorine or fluorine is concentrated in the gate oxide layer within the overlap more proximate at least one of the gate edges than the center. Preferably, the central region is substantially undoped with fluorine and chlorine. The chlorine and/or fluorine can be provided by forming sidewall spacers proximate the opposing lateral edges of the gate, with the sidewall spacers comprising at least one of chlorine or fluorine. The spacers are annealed at a temperature and for a time effective to diffuse the fluorine or chlorine into the gate oxide layer to beneath the gate.Type: GrantFiled: August 31, 2005Date of Patent: March 13, 2007Assignee: Micron Technology, Inc.Inventors: Salman Akram, Akram Ditali
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Publication number: 20070020868Abstract: A method of forming a transistor gate includes forming a gate oxide layer over a semiconductive substrate. Chlorine is provided within the gate oxide layer. A gate is formed proximate the gate oxide layer. In another method, a gate and a gate oxide layer are formed in overlapping relation, with the gate having opposing edges and a center therebetween. At least one of chlorine or fluorine is concentrated in the gate oxide layer within the overlap more proximate at least one of the gate edges than the center. Preferably, the central region is substantially undoped with fluorine and chlorine. The chlorine and/or fluorine can be provided by forming sidewall spacers proximate the opposing lateral edges of the gate, with the sidewall spacers comprising at least one of chlorine or fluorine. The spacers are annealed at a temperature and for a time effective to diffuse the fluorine or chlorine into the gate oxide layer to beneath the gate.Type: ApplicationFiled: September 11, 2006Publication date: January 25, 2007Inventors: Salman Akram, Akram Ditali
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Patent number: 7105411Abstract: A method of forming a transistor gate includes forming a gate oxide layer over a semiconductive substrate. Chlorine is provided within the gate oxide layer. A gate is formed proximate the gate oxide layer. In another method, a gate and a gate oxide layer are formed in overlapping relation, with the gate having opposing edges and a center therebetween. At least one of chlorine or fluorine is concentrated in the gate oxide layer within the overlap more proximate at least one of the gate edges than the center. Preferably, the central region is substantially undoped with fluorine and chlorine. The chlorine and/or fluorine can be provided by forming sidewall spacers proximate the opposing lateral edges of the gate, with the sidewall spacers comprising at least one of chlorine or fluorine. The spacers are annealed at a temperature and for a time effective to diffuse the fluorine or chlorine into the gate oxide layer to beneath the gate.Type: GrantFiled: April 14, 1999Date of Patent: September 12, 2006Assignee: Micron Technology, Inc.Inventors: Salman Akram, Akram Ditali
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Publication number: 20060001054Abstract: A method of forming a transistor gate includes forming a gate oxide layer over a semiconductive substrate. Chlorine is provided within the gate oxide layer. A gate is formed proximate the gate oxide layer. In another method, a gate and a gate oxide layer are formed in overlapping relation, with the gate having opposing edges and a center therebetween. At least one of chlorine or fluorine is concentrated in the gate oxide layer within the overlap more proximate at least one of the gate edges than the center. Preferably, the central region is substantially undoped with fluorine and chlorine. The chlorine and/or fluorine can be provided by forming sidewall spacers proximate the opposing lateral edges of the gate, with the sidewall spacers comprising at least one of chlorine or fluorine. The spacers are annealed at a temperature and for a time effective to diffuse the fluorine or chlorine into the gate oxide layer to beneath the gate.Type: ApplicationFiled: August 31, 2005Publication date: January 5, 2006Inventors: Salman Akram, Akram Ditali
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Patent number: 6593196Abstract: A method of forming a transistor gate includes forming a gate oxide layer over a semiconductive substrate. Chlorine is provided within the gate oxide layer. A gate is formed proximate the gate oxide layer. In another method, a gate and a gate oxide layer are formed in overlapping relation, with the gate having opposing edges and a center therebetween. At least one of chlorine or fluorine is concentrated in the gate oxide layer within the overlap more proximate at least one of the gate edges than the center. Preferably, the central region is substantially undoped with fluorine and chlorine. The chlorine and/or fluorine can be provided by forming sidewall spacers proximate the opposing lateral edges of the gate, with the sidewall spacers comprising at least one of chlorine or fluorine. The spacers are annealed at a temperature and for a time effective to diffuse the fluorine or chlorine into the gate oxide layer to beneath the gate.Type: GrantFiled: April 23, 1999Date of Patent: July 15, 2003Assignee: Micron Technology, Inc.Inventors: Salman Akram, Akram Ditali
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Publication number: 20030017689Abstract: A method of forming a transistor gate includes forming a gate oxide layer over a semiconductive substrate. Chlorine is provided within the gate oxide layer. A gate is formed proximate the gate oxide layer. In another method, a gate and a gate oxide layer are formed in overlapping relation, with the gate having opposing edges and a center therebetween. At least one of chlorine or fluorine is concentrated in the gate oxide layer within the overlap more proximate at least one of the gate edges than the center. Preferably, the central region is substantially undoped with fluorine and chlorine. The chlorine and/or fluorine can be provided by forming sidewall spacers proximate the opposing lateral edges of the gate, with the sidewall spacers comprising at least one of chlorine or fluorine. The spacers are annealed at a temperature and for a time effective to diffuse the fluorine or chlorine into the gate oxide layer to beneath the gate.Type: ApplicationFiled: April 23, 1999Publication date: January 23, 2003Inventors: SALMAN AKRAM, AKRAM DITALI
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Patent number: 6288433Abstract: One aspect of the invention provides a transistor including semiconductive material and a transistor gate having gate oxide positioned therebetween. The gate has opposing gate edges and a central region therebetween, and the gate oxide has opposing edges substantially laterally aligned with the opposing gate edges. A source is formed laterally proximate one of the gate edges and a drain is formed laterally proximate the other of the gate edges. At least one of fluorine or chlorine is concentrated in the gate oxide layer between the semiconductive material and the transistor gate more proximate at least one of the gate edges than the central region. Another aspect of the invention provides a transistor comprising semiconductive material and a transistor gate having gate oxide positioned therebetween. The gate has opposing gate edges and a central region therebetween, and the gate oxide has opposing edges substantially laterally aligned with the opposing gate edges.Type: GrantFiled: August 21, 2000Date of Patent: September 11, 2001Assignee: Micron Technology, Inc.Inventors: Salman Akram, Akram Ditali
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Patent number: 5998274Abstract: A multiple implant lightly doped drain ("MILDD") field effect transistor is disclosed. The transistor includes a channel, a gate, a dielectric structure that separates the gate from the channel, a source region and a drain region. The drain region has a first drain subregion, a second drain subregion and a third drain subregion. Each drain subregion has a dopant concentration that differs from that of the other two drain subregions. A method of forming the same is also disclosed.Type: GrantFiled: October 14, 1998Date of Patent: December 7, 1999Assignee: Micron Technology, Inc.Inventors: Salman Akram, Akram Ditali
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Patent number: 5866460Abstract: A multiple implant lightly doped drain ("MILDD") field effect transistor is disclosed. The transistor includes a channel, a gate, a dielectric structure that separates the gate from the channel, a source region and a drain region. The drain region has a first drain subregion, a second drain subregion and a third drain subregion. Each drain subregion has a dopant concentration that differs from that of the other two drain subregions. A method of forming the same is also disclosed.Type: GrantFiled: April 10, 1997Date of Patent: February 2, 1999Assignee: Micron Technology, Inc.Inventors: Salman Akram, Akram Ditali
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Patent number: 5719425Abstract: A multiple implant lightly doped drain ("MILDD") field effect transistor is disclosed. The transistor includes a channel, a gate, a dielectric structure that separates the gate from the channel, a source region and a drain region. The drain region has a first drain subregion, a second drain subregion and a third drain subregion. Each drain subregion has a dopant concentration that differs from that of the other two drain subregions. A method of forming the same is also disclosed.Type: GrantFiled: January 31, 1996Date of Patent: February 17, 1998Assignee: Micron Technology, Inc.Inventors: Salman Akram, Akram Ditali
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Patent number: 5393683Abstract: The present invention includes a method of forming semiconductor oxide layers and, in particular, gate oxide layers, in MOS semiconductor devices formed on silicon substrates. The method includes the steps of forming a first silicon oxide sublayer on the silicon substrate in an atmosphere including primarily oxygen, and forming a second silicon oxide sublayer over the first sublayer in an atmosphere including primarily nitrous oxide (N.sub.2 O). Preferably, the first and second sublayers represent 80 percent and 20 percent, respectively, of the silicon oxide layer.Type: GrantFiled: May 26, 1992Date of Patent: February 28, 1995Assignee: Micron Technology, Inc.Inventors: Viju K. Mathews, Charles H. Dennison, Pierre Fazan, Roy Maddox, Akram Ditali