Abstract: Methods and systems for improving encoding of a picture or a frame are disclosed. According to one embodiment, a method for encoding video frames includes receiving for a frame, several binarized symbols that include a number of bins corresponding to one or more contexts. For each context from one or more contexts, the method includes entropy encoding in a first pass bins associated with the context using an initial probability distribution for the context; generating counts of zeros and ones in a set of bins associated with the context; updating the initial probability distribution using the respective counts of zeros and ones, to obtain an updated probability distribution; and entropy encoding in a second pass the bins associated with the context using the updated probability distribution, to provide at least a part of an encoded bitstream.

Abstract: Methods and systems for adjusting bit usage during encoding of the image blocks of a picture or a frame are disclosed. According to one embodiment, a method is provided for adjusting bit usage in video compression. The method includes obtaining an estimated bit or byte size of an image block of a video frame, and determining whether the estimated size is less than a first selected threshold. An adjustment to a quantization parameter (QP) is selected based on the determination, so that the actual bit/byte size of the block may be adjusted according to a target size.

Abstract: Examples of apparatuses and methods for performing staggered-field intra-refresh process are described herein. An example apparatus may include an encoder configured to provide an encoded bitstream based on a video signal. The encoder is configured to perform a staggered-field intra-refresh process over a series of frames of the video signal, where a frame of the series of frames is divided into a plurality of regions. The encoder includes an intra-refresh block configured to refresh a region of frame for a first field of the frame that is spatially offset from a region of the frame refreshed for a second field.

Abstract: An analog signal gain control circuit(ASGC) for a digital radio HomePlug orthogonal frequency division multiplexing (OFDM) receiver includes a digital variable gain amplifier (DVGA) to control the gain of a received signal to achieve a desired signal amplitude to match a dynamic range of an analog-to-digital converter (ADC), an inverse scaling stage controlled to inverse-scale the signal output by the ADC, and a two-stage fast attack and slow decay filter that outputs control signals to the DVGA and to the inverse scaling stage. The fast attack and slow decay filter rapidly responds to an increase in signal amplitude and slowly decays the amplitude of the control signal in response to a decrease in input signal amplitude.

Abstract: An analog signal gain control circuit(ASGC) for a digital radio HomePlug orthogonal frequency division multiplexing (OFDM) receiver includes a digital variable gain amplifier (DVGA) to control the gain of a received signal to achieve a desired signal amplitude to match a dynamic range of an analog-to-digital converter (ADC), an inverse scaling stage controlled to inverse-scale the signal output by the ADC, and a two-stage fast attack and slow decay filter that outputs control signals to the DVGA and to the inverse scaling stage. The fast attack and slow decay filter rapidly responds to an increase in signal amplitude and slowly decays the amplitude of the control signal in response to a decrease in input signal amplitude.