Abstract: A semiconductor device assembly can include a first semiconductor device and an interposer. The interposer can include a substrate and through vias in which individual vias include an exposed portion and an embedded portion, the exposed portions projecting from one or both of the first surface and the second surface of the substrate, and the embedded portions extending through at least a portion of the substrate. The interposer can include one or more test pads, a first electrical contact, and a second electrical contact. The semiconductor device assembly can include a controller positioned on an opposite side of the interposer from the first semiconductor device and operably coupled to the interposer via connection to the second electrical contact.

Abstract: A semiconductor device assembly can include an assembly substrate having a top surface, a top semiconductor device having a bottom surface, and a plurality of intermediary semiconductor devices. Each of intermediary semiconductor device can be bonded to both the assembly substrate top surface and the top device bottom surface. Each intermediary semiconductor device can also include a semiconductor substrate, a memory array, a first bond pad, a second bond pad, and a conductive column. The first bond pad can electrically couple the assembly substrate to the intermediary semiconductor device; the second bond pad can electrically couple the top semiconductor device to the intermediary semiconductor device; and the conductive column can electrically couple the first bond pad to the second bond pad, and can be exclusive of any electrical connection to the memory array.

Abstract: Stacked semiconductor assemblies, and related systems and methods, are disclosed herein. A representative stacked semiconductor assembly can include a lowermost die and two or more modules carried by an upper surface of the lowermost die. Each of the module(s) can include a base die and one or more upper dies and/or an uppermost die carried by the base die. Each of the dies in the module is coupled via hybrid bonds between adjacent dies. Further, the base die in a lowermost module is coupled to the lowermost die by hybrid bonds. As a result of the modular construction, the lowermost die can have a first longitudinal footprint, the base die in each of the module(s) can have a second longitudinal footprint smaller than the first longitudinal footprint, and each of the upper die(s) and/or the uppermost die can have a third longitudinal footprint smaller than the second longitudinal footprint.

Abstract: A semiconductor device assembly can include a first semiconductor device and an interposer. The interposer can include a substrate and through vias in which individual vias include an exposed portion and an embedded portion, the exposed portions projecting from one or both of the first surface and the second surface of the substrate, and the embedded portions extending through at least a portion of the substrate. The interposer can include one or more test pads, a first electrical contact, and a second electrical contact. The semiconductor device assembly can include a controller positioned on an opposite side of the interposer from the first semiconductor device and operably coupled to the interposer via connection to the second electrical contact.

Abstract: A semiconductor device assembly can include a semiconductor device having a substrate and vias electrically connected to circuitry of the semiconductor device. Individual vias can have an embedded portion extending from the first side to the second side of the substrate and an exposed portion projecting from the second side of the substrate. The assembly can include a density-conversion connector comprising a connector substrate and a first array of contacts formed at the first side thereof, the first array of contacts occupying a first footprint area on the first side thereof, and wherein individual contacts of the first array are electrically connected to the exposed portion of a corresponding via of the semiconductor device. The assembly can include a second array of contacts electrically connected to the first array, formed at the second side of the connector substrate, and occupying a second footprint area larger than the first footprint area.

Abstract: A semiconductor device assembly can include a first semiconductor device and an interposer. The interposer can include a substrate and through vias in which individual vias include an exposed portion and an embedded portion, the exposed portions projecting from one or both of the first surface and the second surface of the substrate, and the embedded portions extending through at least a portion of the substrate. The interposer can include one or more test pads, a first electrical contact, and a second electrical contact. The semiconductor device assembly can include a controller positioned on an opposite side of the interposer from the first semiconductor device and operably coupled to the interposer via connection to the second electrical contact.

Abstract: Bond pads for semiconductor die assemblies, and associated methods and systems are disclosed. In one embodiment, a semiconductor die assembly includes a first semiconductor die including a first bond pad on a first side of the first semiconductor die. The semiconductor die assembly further includes a second semiconductor die including a second bond pad on a second side of the second semiconductor die. The first bond pad is aligned and bonded to the second bond pad at a bonding interface between the first and second bond pads, and at least one of the first and second bond pads include a first metal and a second metal different than the first metal. Further, the first metal is located at the bonding interface and the second metal has a first thickness corresponding to at least one-fourth of a second thickness of the first or second bond pad.

Abstract: A semiconductor device assembly can include a first semiconductor device and an interposer. The interposer can include a substrate and through vias in which individual vias include an exposed portion and an embedded portion, the exposed portions projecting from one or both of the first surface and the second surface of the substrate, and the embedded portions extending through at least a portion of the substrate. The interposer can include one or more test pads, a first electrical contact, and a second electrical contact. The semiconductor device assembly can include a controller positioned on an opposite side of the interposer from the first semiconductor device and operably coupled to the interposer via connection to the second electrical contact.

Abstract: A semiconductor device assembly includes a substrate having a plurality of external connections, a first shingled stack of semiconductor dies disposed directly over a first location on the substrate and electrically coupled to a first subset of the plurality of external connections, and a second shingled stack of semiconductor dies disposed directly over a second location on the substrate and electrically coupled to a second subset of the plurality of external connections. The semiconductor device assembly further includes an encapsulant at least partially encapsulating the substrate, the first shingled stack and the second shingled stack.

Abstract: A semiconductor device assembly can include a first semiconductor device and an interposer. The interposer can include a substrate and through vias in which individual vias include an exposed portion and an embedded portion, the exposed portions projecting from one or both of the first surface and the second surface of the substrate, and the embedded portions extending through at least a portion of the substrate. The interposer can include one or more test pads, a first electrical contact, and a second electrical contact. The semiconductor device assembly can include a controller positioned on an opposite side of the interposer from the first semiconductor device and operably coupled to the interposer via connection to the second electrical contact.

Abstract: A semiconductor device assembly can include a semiconductor device having a substrate and vias electrically connected to circuitry of the semiconductor device. Individual vias can have an embedded portion extending from the first side to the second side of the substrate and an exposed portion projecting from the second side of the substrate. The assembly can include a density-conversion connector comprising a connector substrate and a first array of contacts formed at the first side thereof, the first array of contacts occupying a first footprint area on the first side thereof, and wherein individual contacts of the first array are electrically connected to the exposed portion of a corresponding via of the semiconductor device. The assembly can include a second array of contacts electrically connected to the first array, formed at the second side of the connector substrate, and occupying a second footprint area larger than the first footprint area.

Abstract: A semiconductor device assembly and method of forming a semiconductor device assembly that includes a first substrate, a second substrate disposed over the first substrate, at least one interconnect between the substrates, and at least one pillar extending from the bottom surface of the first substrate. The pillar is electrically connected to the interconnect and is located adjacent to a side of the first substrate. The pillar is formed by filling a via through the substrate with a conductive material. The first substrate may include an array of pillars extending from the bottom surface adjacent to a side of the substrate that are formed from a plurality of filled vias. The substrate may include a test pad located on the bottom surface or located on the top surface. The pillars may include a removable coating enabling the pillars to be probed without damaging the inner conductive portion of the pillar.

Abstract: A semiconductor device assembly can include a semiconductor device having a substrate and vias electrically connected to circuitry of the semiconductor device. Individual vias can have an embedded portion extending from the first side to the second side of the substrate and an exposed portion projecting from the second side of the substrate. The assembly can include a density-conversion connector comprising a connector substrate and a first array of contacts formed at the first side thereof, the first array of contacts occupying a first footprint area on the first side thereof, and wherein individual contacts of the first array are electrically connected to the exposed portion of a corresponding via of the semiconductor device. The assembly can include a second array of contacts electrically connected to the first array, formed at the second side of the connector substrate, and occupying a second footprint area larger than the first footprint area.

Abstract: A semiconductor device assembly can include a first semiconductor device and an interposer. The interposer can include a substrate and through vias in which individual vias include an exposed portion and an embedded portion, the exposed portions projecting from one or both of the first surface and the second surface of the substrate, and the embedded portions extending through at least a portion of the substrate. The interposer can include one or more test pads, a first electrical contact, and a second electrical contact. The semiconductor device assembly can include a controller positioned on an opposite side of the interposer from the first semiconductor device and operably coupled to the interposer via connection to the second electrical contact.

Abstract: A semiconductor device assembly can include a semiconductor device having a substrate and vias electrically connected to circuitry of the semiconductor device. Individual vias can have an embedded portion extending from the first side to the second side of the substrate and an exposed portion projecting from the second side of the substrate. The assembly can include a density-conversion connector comprising a connector substrate and a first array of contacts formed at the first side thereof, the first array of contacts occupying a first footprint area on the first side thereof, and wherein individual contacts of the first array are electrically connected to the exposed portion of a corresponding via of the semiconductor device. The assembly can include a second array of contacts electrically connected to the first array, formed at the second side of the connector substrate, and occupying a second footprint area larger than the first footprint area.

Abstract: A semiconductor device assembly and method of forming a semiconductor device assembly that includes a first substrate, a second substrate disposed over the first substrate, at least one interconnect between the substrates, and at least one pillar extending from the bottom surface of the first substrate. The pillar is electrically connected to the interconnect and is located adjacent to a side of the first substrate. The pillar is formed by filling a via through the substrate with a conductive material. The first substrate may include an array of pillars extending from the bottom surface adjacent to a side of the substrate that are formed from a plurality of filled vias. The substrate may include a test pad located on the bottom surface or located on the top surface. The pillars may include a removable coating enabling the pillars to be probed without damaging the inner conductive portion of the pillar.

Abstract: A semiconductor device assembly includes a substrate having a plurality of external connections, a first shingled stack of semiconductor dies disposed directly over a first location on the substrate and electrically coupled to a first subset of the plurality of external connections, and a second shingled stack of semiconductor dies disposed directly over a second location on the substrate and electrically coupled to a second subset of the plurality of external connections. The semiconductor device assembly further includes an encapsulant at least partially encapsulating the substrate, the first shingled stack and the second shingled stack.

Abstract: A semiconductor device assembly and method of forming a semiconductor device assembly that includes a first substrate, a second substrate disposed over the first substrate, at least one interconnect between the substrates, and at least one pillar extending from the bottom surface of the first substrate. The pillar is electrically connected to the interconnect and is located adjacent to a side of the first substrate. The pillar is formed by filling a via through the substrate with a conductive material. The first substrate may include an array of pillars extending from the bottom surface adjacent to a side of the substrate that are formed from a plurality of filled vias. The substrate may include a test pad located on the bottom surface or located on the top surface. The pillars may include a removable coating enabling the pillars to be probed without damaging the inner conductive portion of the pillar.

Abstract: A semiconductor device assembly includes a substrate having a plurality of external connections, a first shingled stack of semiconductor dies disposed directly over a first location on the substrate and electrically coupled to a first subset of the plurality of external connections, and a second shingled stack of semiconductor dies disposed directly over a second location on the substrate and electrically coupled to a second subset of the plurality of external connections. The semiconductor device assembly further includes an encapsulant at least partially encapsulating the substrate, the first shingled stack and the second shingled stack.

Abstract: A semiconductor device assembly and method of forming a semiconductor device assembly that includes a first substrate, a second substrate disposed over the first substrate, at least one interconnect between the substrates, and at least one pillar extending from the bottom surface of the first substrate. The pillar is electrically connected to the interconnect and is located adjacent to a side of the first substrate. The pillar is formed by filling a via through the substrate with a conductive material. The first substrate may include an array of pillars extending from the bottom surface adjacent to a side of the substrate that are formed from a plurality of filled vias. The substrate may include a test pad located on the bottom surface or located on the top surface. The pillars may include a removable coating enabling the pillars to be probed without damaging the inner conductive portion of the pillar.