Patents by Inventor Akshay Parnami

Akshay Parnami has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240231473
    Abstract: Embodiments described herein may include apparatus, systems, techniques, and/or processes that are directed to adaptively determining an optimum time frame or demotion threshold for when to power down a voltage rail of an idle device. The demotion threshold is typically the point where the energy cost for maintaining power to the device is approximately the same as or exceeds the energy cost of removing power to the device. The demotion threshold may vary with system conditions and may be based on device leakage current, wake voltage, capacitance, voltage regulator power consumption, current workload and the like. A power control unit in the computing system may manage the voltage of the device and determine the optimum demotion threshold. The power control unit may rely on physical inputs such as fuses on a motherboard, system inputs supplied by a manufacturer, current condition inputs and may be implemented in the device's or the system's software or firmware.
    Type: Application
    Filed: December 21, 2022
    Publication date: July 11, 2024
    Inventors: Patrick Kam-shing Leung, Akshay Parnami, Jianwei Dai, Saranya Sridaran Iyengar, Michael F. Mallen
  • Patent number: 11487926
    Abstract: A system can include a nonlinear circuit and a voltage decoder. The nonlinear circuit can perform an operation on an input voltage. The operation can be changed. A voltage decoder can be communicatively coupled to the nonlinear circuit for receiving an output voltage from the nonlinear circuit that results from the operation performed on the input voltage. The voltage decoder can compare the output voltage to a threshold voltage and determine a result of the operation.
    Type: Grant
    Filed: August 29, 2017
    Date of Patent: November 1, 2022
    Assignee: North Carolina State University
    Inventors: Behnam Kia, William Ditto, Yaman Dalal, Ravikanth Somsole, Siva Rama Maruthi Ven Donepudi Krishna Sesha Sai, Allen R. Mendes, Akshay Parnami, Robin George
  • Patent number: 11269396
    Abstract: An apparatus is provided, where the apparatus includes a plurality of processing cores to execute a plurality of processes, a register to store an indicator that is to indicate a preference for either performance or energy efficiency, a first circuitry to determine an effective utilization of a first processing core, based on the indicator, and a second circuitry to select at least one of an operating voltage or an operating frequency of the first processing core, based at least in part on the effective utilization of the first processing core.
    Type: Grant
    Filed: September 28, 2018
    Date of Patent: March 8, 2022
    Assignee: Intel Corporation
    Inventors: Avinash Ananthakrishnan, Stephen Gunther, Amr Muhammad Lotfy El-Sayed, Akshay Parnami
  • Publication number: 20210294954
    Abstract: A system can include a nonlinear circuit and a voltage decoder. The nonlinear circuit can perform an operation on an input voltage. The operation can be changed. A voltage decoder can be communicatively coupled to the nonlinear circuit for receiving an output voltage from the nonlinear circuit that results from the operation performed on the input voltage. The voltage decoder can compare the output voltage to a threshold voltage and determine a result of the operation.
    Type: Application
    Filed: August 29, 2017
    Publication date: September 23, 2021
    Inventors: Behnam Kia, William Ditto, Yaman Dalal, Ravikanth Somsole, Siva Rama Maruthi Ven Donepudi Krishna Sesha Sai, Allen R. Mendes, Akshay Parnami, Robin George
  • Publication number: 20190041962
    Abstract: An apparatus is provided, where the apparatus includes a plurality of processing cores to execute a plurality of processes, a register to store an indicator that is to indicate a preference for either performance or energy efficiency, a first circuitry to determine an effective utilization of a first processing core, based on the indicator, and a second circuitry to select at least one of an operating voltage or an operating frequency of the first processing core, based at least in part on the effective utilization of the first processing core.
    Type: Application
    Filed: September 28, 2018
    Publication date: February 7, 2019
    Inventors: Avinash Ananthakrishnan, Stephen Gunther, Amr Muhammad Lofty El-Sayed, Akshay Parnami