Abstract: A system-on-chip (SoC) includes a processor, a built-in self-testing (BIST) circuitry, and an adaptive masking circuitry. The processor generates a sweep enable (SWEN) signal to initiate a self-testing operation of the SoC. The BIST circuitry receives the SWEN signal and generates a set of sweep events, such that a transition of the processor from a low power (LP) mode to an active mode is initiated based on the generation of each sweep event. The BIST circuitry further receives a status signal, and identifies a subset of sweep events at which the transition of the processor from the LP mode to the active mode failed, for generating sweep failure data. The adaptive masking circuitry receives the sweep failure data and generates a mask signal, to prevent a transition of the first processor from the LP mode to the active mode, during a non-testing operation of the SoC.

Abstract: A system-on-chip (SoC) includes a processor, a built-in self-testing (BIST) circuitry, and an adaptive masking circuitry. The processor generates a sweep enable (SWEN) signal to initiate a self-testing operation of the SoC. The BIST circuitry receives the SWEN signal and generates a set of sweep events, such that a transition of the processor from a low power (LP) mode to an active mode is initiated based on the generation of each sweep event. The BIST circuitry further receives a status signal, and identifies a subset of sweep events at which the transition of the processor from the LP mode to the active mode failed, for generating sweep failure data. The adaptive masking circuitry receives the sweep failure data and generates a mask signal, to prevent a transition of the first processor from the LP mode to the active mode, during a non-testing operation of the SoC.

Abstract: A method, a system and a computer programmable product have been provided for arbitrating bus cycles among a plurality of device nodes. Requests for bus grant are received from the device nodes. Each request includes values of one or more arbitration parameters. The requests grouped at a first stage, with two requests in each group. A comparison is performed in each group, based on the values of the one or more parameters. Further, winners from each comparison are forwarded to a next stage. Subsequently, comparisons are performed over one or more stages to select a winner of the bus grant.

Abstract: A method, a system and a computer programmable product have been provided for arbitrating bus cycles among a plurality of device nodes. Requests for bus grant are received from the device nodes. Each request includes values of one or more arbitration parameters. The requests grouped at a first stage, with two requests in each group. A comparison is performed in each group, based on the values of the one or more parameters. Further, winners from each comparison are forwarded to a next stage. Subsequently, comparisons are performed over one or more stages to select a winner of the bus grant.