Patents by Inventor Akshay Singh

Akshay Singh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250094168
    Abstract: Methods, systems, and computer-readable media are provided for configuration-driven application deployments. An example method can include obtaining a platform-agnostic application configuration including a plurality of application components that can be interpreted by a plurality of system-specific application platforms to dynamically render different applications; based on the platform-agnostic application configuration, generating, by a computing device using a system-specific application platform, an application including a platform-specific interpretation of the platform-agnostic application configuration; and executing the application at the computing device.
    Type: Application
    Filed: September 27, 2024
    Publication date: March 20, 2025
    Applicant: Quicket Solutions, Inc.
    Inventors: Akshay Singh, Scott Knowles, John Pierce, Bryan Chance, Zhuofan Zhang, John Sternberg, Adam Debuysscher
  • Patent number: 12135966
    Abstract: Methods, systems, and computer-readable media are provided for configuration-driven application deployments. An example method can include obtaining a platform-agnostic application configuration including a plurality of application components that can be interpreted by a plurality of system-specific application platforms to dynamically render different applications; based on the platform-agnostic application configuration, generating, by a computing device using a system-specific application platform, an application including a platform-specific interpretation of the platform-agnostic application configuration; and executing the application at the computing device.
    Type: Grant
    Filed: November 3, 2023
    Date of Patent: November 5, 2024
    Assignee: Quicket Solutions, Inc.
    Inventors: Akshay Singh, Scott Knowles, John Pierce, Bryan Chance, Zhuofan Zhang, John Sternberg, Adam Debuysscher
  • Publication number: 20240061678
    Abstract: Methods, systems, and computer-readable media are provided for configuration-driven application deployments. An example method can include obtaining a platform-agnostic application configuration including a plurality of application components that can be interpreted by a plurality of system-specific application platforms to dynamically render different applications; based on the platform-agnostic application configuration, generating, by a computing device using a system-specific application platform, an application including a platform-specific interpretation of the platform-agnostic application configuration; and executing the application at the computing device.
    Type: Application
    Filed: November 3, 2023
    Publication date: February 22, 2024
    Applicant: Quicket Solutions, Inc.
    Inventors: Akshay Singh, Scott Knowles, John Pierce, Bryan Chance, Zhuofan Zhang, John Sternberg, Adam Debuysscher
  • Patent number: 11842187
    Abstract: Methods, systems, and computer-readable media are provided for configuration-driven application deployments. An example method can include obtaining a platform-agnostic application configuration including a plurality of application components that can be interpreted by a plurality of system-specific application platforms to dynamically render different applications; based on the platform-agnostic application configuration, generating, by a computing device using a system-specific application platform, an application including a platform-specific interpretation of the platform-agnostic application configuration; and executing the application at the computing device.
    Type: Grant
    Filed: March 16, 2021
    Date of Patent: December 12, 2023
    Assignee: Quicket Solutions, Inc.
    Inventors: Akshay Singh, Scott Knowles, John Pierce, Bryan Chance, Zhuofan Zhang, John Sternberg, Adam Debuysscher
  • Patent number: 11766641
    Abstract: A nanoadsorbent based filter is used for purification of fluoride and arsenic contaminated water. 140-150 g low cost (˜10 USD/kg) nanoparticles of gamma alumina of 20-25 mg/g fluoride and 25-30 mg/g arsenic adsorption capacity is incorporated in propylene filter without susceptibility of leaching incorporated nanoparticles in water. The cost of domestic defluoridation device containing low cost nanoalumina incorporated filters/cartridges along with housing, overhead tank, tubing and treated water storage container etc. is of very low cost of around 25 USD/device. The fluoride treatment cost would be <0.5 USD/100 lit for 4-5 mg/l fluoride water after 2-3 regenerations while, the arsenic treatment cost using domestic filtration device would be <0.25 USD/100 lit for 90-100 ?g/l arsenic (III) water.
    Type: Grant
    Filed: May 23, 2019
    Date of Patent: September 26, 2023
    Assignee: COUNCIL OF SCIENTIFIC AND INDUSTRIAL RESEARCH
    Inventors: Indra Bhushan Singh, Archana Singh, Swati Dubey, Akshay Singh Tomar, Priyanka Arya, Avanish Kumar Srivastava
  • Publication number: 20220321016
    Abstract: A multi-port power conversion system can have a multi-winding transformer and at least three ports. Each port can be coupled to the multi-winding transformer. Each port can have a semiconductor bridge and a coupling network. For each port, the semiconductor bridge can have two or more levels and can comprise at least two switches. The coupling network for each port can comprise at least one inductor. The semiconductor bridge can be coupled to the multi-winding transformer via the respective coupling network. The multi-port power conversion system can have a multi-active bridge (MAB) architecture that is universally applicable to AC-DC, DC-DC, DC-AC, and AC-AC conversion applications and extendable to any number of ports.
    Type: Application
    Filed: March 29, 2022
    Publication date: October 6, 2022
    Inventors: Alireza KHALIGH, Akshay SINGH, Apurv Kumar YADAV, Chanaka SINGHABAHU, Jianfei CHEN
  • Publication number: 20220172880
    Abstract: A set of multi-winding transformer designs that achieve leakage integration in multi-port power electronics systems is presented. The magnetic design structures are extendable to realize an N-port multi-winding transformer with or without leakage inductance integration, that interfaces different voltage levels (high-voltage and/or low-voltage) with galvanic isolation. The disclosed designs enable: (i) reduced number of discrete magnetic components (ii) high efficiency and high power density; (iii) reduced transformer parasitic capacitances. Furthermore, a global transformer optimization approach that considers magnetizing and leakage inductances, core and winding losses, and parasitic capacitances is presented to systemize the sophisticated multi-winding integrated leakage transformer design process.
    Type: Application
    Filed: November 30, 2021
    Publication date: June 2, 2022
    Inventors: Alireza KHALIGH, Shenli ZOU, Akshay SINGH, Chanaka SINGHABAHU
  • Publication number: 20210286616
    Abstract: Methods, systems, and computer-readable media are provided for configuration-driven application deployments. An example method can include obtaining a platform-agnostic application configuration including a plurality of application components that can be interpreted by a plurality of system-specific application platforms to dynamically render different applications; based on the platform-agnostic application configuration, generating, by a computing device using a system-specific application platform, an application including a platform-specific interpretation of the platform-agnostic application configuration; and executing the application at the computing device.
    Type: Application
    Filed: March 16, 2021
    Publication date: September 16, 2021
    Inventors: Akshay SINGH, Scott KNOWLES, John PIERCE, Bryan CHANCE, Zhuofan ZHANG, John STERNBERG, Adam DEBUYSSCHER
  • Publication number: 20190358592
    Abstract: A nanoadsorbent based filter is used for purification of fluoride and arsenic contaminated water. 140-150 g low cost (˜10 USD/kg) nanoparticles of gamma alumina of 20-25 mg/g fluoride and 25-30 mg/g arsenic adsorption capacity is incorporated in propylene filter without susceptibility of leaching incorporated nanoparticles in water. The cost of domestic defluoridation device containing low cost nanoalumina incorporated filters/cartridges along with housing, overhead tank, tubing and treated water storage container etc. is of very low cost of around 25 USD/device. The fluoride treatment cost would be <0.5 USD/100 lit for 4-5 mg/l fluoride water after 2-3 regenerations while, the arsenic treatment cost using domestic filtration device would be <0.25 USD/100 lit for 90-100 ?g/l arsenic (III) water.
    Type: Application
    Filed: May 23, 2019
    Publication date: November 28, 2019
    Inventors: Indra Bhushan Singh, Archana Singh, Swati Dubey, Akshay Singh Tomar, Priyanka Arya, Avanish Kumar Srivastava
  • Patent number: 10366934
    Abstract: A semiconductor die that includes a first die located on a first side of an interposer and a second die located on a second side of the interposer. Active sides of the first and second dies may each face the interposer. A bond wire may electrically connect the first die to the second side of the interposer and a bond wire may electrically connect the second die to the first side of the interposer. The bond wires may extend through a plurality of windows in the interposer. First and second dies may be attached to a first side of an interposer and may be electrically connected to a second side of the interposer through windows and third and fourth dies may be attached to a second side of the interposer and may be electrically connected to the first side of the interposer through windows.
    Type: Grant
    Filed: November 20, 2018
    Date of Patent: July 30, 2019
    Assignee: Micron Technology, Inc.
    Inventors: Chan Yoo, Akshay Singh, Yi Xu, Liana Foster, Steven Eskildsen
  • Publication number: 20190088565
    Abstract: A semiconductor die that includes a first die located on a first side of an interposer and a second die located on a second side of the interposer. Active sides of the first and second dies may each face the interposer. A bond wire may electrically connect the first die to the second side of the interposer and a bond wire may electrically connect the second die to the first side of the interposer. The bond wires may extend through a plurality of windows in the interposer. First and second dies may be attached to a first side of an interposer and may be electrically connected to a second side of the interposer through windows and third and fourth dies may be attached to a second side of the interposer and may be electrically connected to the first side of the interposer through windows.
    Type: Application
    Filed: November 20, 2018
    Publication date: March 21, 2019
    Inventors: Chan Yoo, Akshay Singh, Yi Xu, Liana Foster, Steven Eskildsen
  • Publication number: 20180358275
    Abstract: A semiconductor die that includes a first die located on a first side of an interposer and a second die located on a second side of the interposer. Active sides of the first and second dies may each face the interposer. A bond wire may electrically connect the first die to the second side of the interposer and a bond wire may electrically connect the second die to the first side of the interposer. The bond wires may extend through a plurality of windows in the interposer. First and second dies may be attached to a first side of an interposer and may be electrically connected to a second side of the interposer through windows and third and fourth dies may be attached to a second side of the interposer and may be electrically connected to the first side of the interposer through windows.
    Type: Application
    Filed: June 13, 2017
    Publication date: December 13, 2018
    Inventors: Chan Yoo, Akshay Singh, Yi Xu, Liana Foster, Steven Eskildsen
  • Patent number: 10153221
    Abstract: A semiconductor die that includes a first die located on a first side of an interposer and a second die located on a second side of the interposer. Active sides of the first and second dies may each face the interposer. A bond wire may electrically connect the first die to the second side of the interposer and a bond wire may electrically connect the second die to the first side of the interposer. The bond wires may extend through a plurality of windows in the interposer. First and second dies may be attached to a first side of an interposer and may be electrically connected to a second side of the interposer through windows and third and fourth dies may be attached to a second side of the interposer and may be electrically connected to the first side of the interposer through windows.
    Type: Grant
    Filed: June 13, 2017
    Date of Patent: December 11, 2018
    Assignee: MICRON TECHNOLOGY, INC.
    Inventors: Chan Yoo, Akshay Singh, Yi Xu, Liana Foster, Steven Eskildsen