Abstract: Messaging protocols used by components in a messaging system to exchange messages conventionally use a reliability mechanism to ensure that each message sent by a sender is received, without compromise, by the intended receiver. Typically, this reliability mechanism involves use of a returned acknowledgement message to the message sender, with automatic retransmission of the message by the sender when the acknowledgement message is not received (e.g. within a defined timeframe). However, existing acknowledgement-based reliability mechanisms require that a sender identifier be included in the message header, which increases the overhead of the message. The present disclosure provides an epoch-based reliability mechanism that allows the sender identifier to be omitted from the message header to minimize overhead and maximize the efficient use of the available bandwidth.

Abstract: In one example, a memory network may control access to a shared memory that is by multiple compute nodes. The memory network may control the access to the shared memory by receiving a memory access request originating from an application executing on the multiple compute nodes and determining a priority for processing the memory access request. The priority determined by the memory network may correspond to a memory address range in the memory that is specifically used by the application.

Abstract: In some examples, a node of a computing system may include a failure identification engine and a failure response engine. The failure identification engine may identify a failure condition for a system function of the node and the failure response engine may store a failure indication in a shared memory to trigger takeover of the system function by a different node of the computing system.

Abstract: Examples relate to virtual channel routing in networks considering VC actions to be performed by the packets while routed through the network. A packet is received at an input port of a network device of a network and an output port and a VC action is determined from a routing table associated to the input port based on a packet's destination network device. A VC mask is determined from a Virtual Channel Action Table (VCAT), associated to the routing table, based on a packet's ingress VC and the VC action. A particular VC among the set of VCs defined in the VC mask is selected and the packet is routed to the destination network device using the output port and the particular VC.

Abstract: Examples relate to virtual channel routing in networks considering VC actions to be performed by the packets while routed through the network. A packet is received at an input port of a network device of a network and an output port and a VC action is determined from a routing table associated to the input port based on a packet's destination network device. A VC mask is determined from a Virtual Channel Action Table (VCAT), associated to the routing table, based on a packet's ingress VC and the VC action. A particular VC among the set of VCs defined in the VC mask is selected and the packet is routed to the destination network device using the output port and the particular VC.

Abstract: In some examples, a node of a computing system may include a failure identification engine and a failure response engine. The failure identification engine may identify a failure condition for a system function of the node and the failure response engine may store a failure indication in a shared memory to trigger takeover of the system function by a different node of the computing system.

Abstract: In one example, a memory network may control access to a shared memory that is by multiple compute nodes. The memory network may control the access to the shared memory by receiving a memory access request originating from an application executing on the multiple compute nodes and determining a priority for processing the memory access request. The priority determined by the memory network may correspond to a memory address range in the memory that is specifically used by the application.

Abstract: Examples disclosed herein relate to receiving, by a scheduler, a request for a window during which to send a data packet through a crossbar. Transmission of the data packet is dependent upon a pool of transmission credits. The scheduler determines whether the pool of transmission credits is sufficient for transmitting the data packet, and when it is determined that the pool of transmission credits is insufficient, the scheduler determines whether to block the request or to speculatively arbitrate the window based on a value of a speculative request counter.

Abstract: Illustrated is a computer system and method that includes a Processing Element (PE) to generate a data packet that is routed along a shortest path that includes a plurality of routers in a multiple dimension network. The system and method further include a router, of the plurality of routers, to de-route the data packet from the shortest path to an additional path, the de-route to occur where the shortest path is congested and the additional path links the router and an additional router in a dimension of the multiple dimension network.

Abstract: Examples of a computer system packaged in a three-dimensional stack of dies are described. The package includes an electrical die and an optical die coupled to and stacked with the electrical die. The electrical die includes circuitry to process and communicate electrical signals, and the optical die includes structures to transport optical signals. The electrical die has a smaller area than the optical die so that the optical die includes an exposed mezzanine which is configured with optical input/output ports. Additionally, the packaging can be configured to provide structural support against insertion forces for external optical connections.

Abstract: Various embodiments of the present invention are directed to optical-based barrier methods and systems for synchronizing processing of two or more threads. In one method embodiment of a barrier method, each thread can be processed by a different processing element. The method comprises transmitting a lightwave along a waveguide that is optically coupled to each of the processing elements. Each processing element that processes a thread turns on diverter capable of diverting substantially all of the lightwave from the waveguide. Each processing element that completes processing of a thread turns off a corresponding diverter. A barrier is reached when all of the processing elements have turned off the corresponding diverters and discontinued diverting a portion of the lightwave from the waveguide.

Abstract: Illustrated is a computer system and method that includes a Processing Element (PE) to generate a data packet that is routed along a shortest path that includes a plurality of routers in a multiple dimension network. The system and method further include a router, of the plurality of routers, to de-route the data packet from the shortest path to an additional path, the de-route to occur where the shortest path is congested and the additional path links the router and an additional router in a dimension of the multiple dimension network.

Abstract: Examples of a computer system packaged in a three-dimensional stack of dies are described. The package includes an electrical die and an optical die coupled to and stacked with the electrical die. The electrical die includes circuitry to process and communicate electrical signals, and the optical die includes structures to transport optical signals. The electrical die has a smaller area than the optical die so that the optical die includes an exposed mezzanine which is configured with optical input/output ports. Additionally, the packaging can be configured to provide structural support against insertion forces for external optical connections.

Abstract: Various embodiments of a system and method for producing a thin film filter are disclosed.