Abstract: An integrated circuit comprises a microprocessor for generating data signals along a data bus by way of an inverter to a plurality of input/output switching buffers. The buffers pass the data signals to a transmission bus for onward transmission to a receiving integrated circuit. A respective drain and source supply power to the buffers. A transition checking circuit monitors the number of data signals on the data bus simultaneously switching from a first to a second logic state and a control circuit counts the number of the simultaneous switching data signals and generates a flag signal when the count exceeds half the number of buffers. The flag signal is applied to the inverter to invert all of the data signals on the bus.

Abstract: A method of signal integrity analysis includes providing a pre-defined circuit layout in SPICE format; selecting from a menu at least one of a technology, a driver, a driver package, a transmission line, a termination, a receiver package, a stimulus, a measurement, options, and sweep parameters for the predefined circuit layout; generating a SPICE netlist from the pre-defined circuit layout; simulating the predefined circuit layout from the SPICE netlist; and generating as output at least one of a listing, a waveform, and a signal measurement from the simulation of the pre-defined circuit layout.

Abstract: An integrated circuit comprises a microprocessor for generating data signals along a data bus by way of an inverter to a plurality of input/output switching buffers. The buffers pass the data signals to a transmission bus for onward transmission to a receiving integrated circuit. A respective drain and source supply power to the buffers. A transition checking circuit monitors the number of data signals on the data bus simultaneously switching from a first to a second logic state and a control circuit counts the number of the simultaneous switching data signals and generates a flag signal when the count exceeds half the number of buffers. The flag signal is applied to the inverter to invert all of the data signals on the bus.