Patents by Inventor Alaa Hussein

Alaa Hussein has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11146583
    Abstract: The presently disclosed technology provides a threat-specific network risk evaluation tailored to a client's security objectives. The present technology may include identifying a plurality of threats to a first component of a networked system and assigning a plurality of weighting values to the plurality of threats according to the client's security objectives. The present technology may include identifying a plurality of vulnerabilities of the first component and determining a set of relevant threats for the first vulnerability based on the nature of the vulnerability and the weighting values assigned to the plurality of threats. The set of relevant threats includes one or more of the plurality of threats. The present technology may include determining a set of relevant threats for each of the identified vulnerabilities of the first component and calculating a risk of the first component based on the sets of the relevant threats.
    Type: Grant
    Filed: May 1, 2019
    Date of Patent: October 12, 2021
    Assignees: QATAR FOUNDATION FOR EDUCATION, SCIENCE AND COMMUNITY DEVELOPMENT, QATAR UNIVERSITY
    Inventors: Armstrong Nhlabatsi, Jin Hong, Dong Seong Kim, Rachael Fernandez, Alaa Hussein, Noora Fetais, Khaled M. Khan
  • Patent number: 11033042
    Abstract: In one aspect, with a sounding rocket, a space-capsule bean roasting system is placed into a sub-orbital flight path. The space-capsule bean roasting system includes a re-entry capsule. The re-entry capsule includes a bean roasting system and a payload of raw beans. The re-entry capsule re-enters the Earth's atmosphere at a specific trajectory. The re-entry heat is transferred to the bean roasting system. The payload of raw beans is roasted with the re-entry heat.
    Type: Grant
    Filed: January 25, 2019
    Date of Patent: June 15, 2021
    Inventors: Anders Isaac Cavallini-Gardner, Hatem Alaa Hussein
  • Publication number: 20200351295
    Abstract: The presently disclosed technology provides a threat-specific network risk evaluation tailored to a client's security objectives. The present technology may include identifying a plurality of threats to a first component of a networked system and assigning a plurality of weighting values to the plurality of threats according to the client's security objectives. The present technology may include identifying a plurality of vulnerabilities of the first component and determining a set of relevant threats for the first vulnerability based on the nature of the vulnerability and the weighting values assigned to the plurality of threats. The set of relevant threats includes one or more of the plurality of threats. The present technology may include determining a set of relevant threats for each of the identified vulnerabilities of the first component and calculating a risk of the first component based on the sets of the relevant threats.
    Type: Application
    Filed: May 1, 2019
    Publication date: November 5, 2020
    Inventors: Armstrong Nhlabatsi, Jin Hong, Dong Seong Kim, Rachael Fernandez, Alaa Hussein, Noora Fetais, Khaled M. Khan
  • Publication number: 20200000115
    Abstract: In one aspect, with a sounding rocket, a space-capsule bean roasting system is placed into a sub-orbital flight path. The space-capsule bean roasting system includes a re-entry capsule. The re-entry capsule comprises a bean roasting system and a payload of raw beans. The re-entry capsule re-enters the Earth's atmosphere at a specific trajectory. The re-entry heat is transferred to the bean roasting system. The payload of raw beans is roasted with the re-entry heat.
    Type: Application
    Filed: January 25, 2019
    Publication date: January 2, 2020
    Inventors: ANDERS ISAAC CAVALLINI-GARDNER, HATEM ALAA HUSSEIN
  • Publication number: 20170150562
    Abstract: The capacitor-less LED drive is an LED drive circuit having a design based on the utilization of the internal capacitance of the LED to replace the smoothing capacitor in a conventional buck converter in a power supply. LED lighting systems usually have many LEDs for better illumination that can reach multiple tens of LEDs. Such a configuration can be utilized to enlarge the total internal capacitance, and hence minimize the output ripple. Also, the switching frequency of the buck converter is selected such that minimum ripple appears at the output. The functionality of the present design is confirmed experimentally, and the efficiency of the drive is 85% at full load.
    Type: Application
    Filed: November 24, 2015
    Publication date: May 25, 2017
    Inventors: MUNIR A. AL-ABSI, ZAINULABIDEEN J. KHALIFA, ALAA HUSSEIN, HESHAM M. AL BAR
  • Patent number: 9648684
    Abstract: The capacitor-less LED drive is an LED drive circuit having a design based on the utilization of the internal capacitance of the LED to replace the smoothing capacitor in a conventional buck converter in a power supply. LED lighting systems usually have many LEDs for better illumination that can reach multiple tens of LEDs. Such a configuration can be utilized to enlarge the total internal capacitance, and hence minimize the output ripple. Also, the switching frequency of the buck converter is selected such that minimum ripple appears at the output. The functionality of the present design is confirmed experimentally, and the efficiency of the drive is 85% at full load.
    Type: Grant
    Filed: November 24, 2015
    Date of Patent: May 9, 2017
    Assignee: KING FAHD UNIVERSITY OF PETROLEUM AND MINERALS
    Inventors: Munir A. Al-Absi, Zainulabideen J. Khalifa, Alaa Hussein, Hesham M. Al Bar
  • Patent number: 8610486
    Abstract: A current-mode analog computational circuit can be controlled to produce multiplying, squaring, divider and inverse functions and corresponding current outputs. The current-mode analog computational circuit is based on an implementation using MOSFETs operating in a sub-threshold region as can provide relatively ultra-low power dissipation. Furthermore, the current-mode analog computational circuit can be operated from a ±0.75 V DC supply. Tanner simulation results conducted using a 0.35-?m TSMC CMOS process confirmed the functionality of the multiplying, squaring, divider and inverse functions of the circuit. The current-mode analog computational circuit advantageously can have a total power consumption of 2.3 ?W, a total harmonic distortion is 1.1%, a maximum linearity error of 0.3% and a bandwidth of 2.3 MHz.
    Type: Grant
    Filed: July 2, 2013
    Date of Patent: December 17, 2013
    Assignees: King Fahd University of Petroleum and Minerals, King Abdulaziz City for Science and Technology
    Inventors: Munir A. Al-Absi, Alaa A. Hussein, Muhammad T. Abuelma'Atti