Abstract: The present invention concerns a transistor of semiconductor materials of the 3-5 group on silicon of the type comprising a silicon substrate, at least one layer of semi-insulating 3-5 material and several doped layers of 3-5 group semiconductor material in which is defined at least one conducting channel equipped with a gate metallization, each channel being situated between two access regions alternately known as source and drain, each source and drain regions with a metallization, one of the two access regions to a channel being electrically and thermally connected to the silicon substrate. In accordance with the invention, the transistor comprises between the silicon substrate and the semi-insulating layer of 3-5 group semiconductor material, at least one buffer layer of intrinsic silicon.