Abstract: The method to check module chaining in a modular software architecture located in an electronic unit with microprocessor comprising, apart from the microprocessor, a memory space, uses an identification, secured by the hardware, of the calling module. The invention also concerns an electronic unit with microprocessor designed to implement the above method.

Abstract: A method to control access to a sector of a flash type memory of an electronic module. The method includes receiving a write request to write data to an area of a partition, wherein the partition is located within the sector and, prior to writing to the data, determining whether an owner of the data to be written has write access to the partition of the sector and permission to erase the entire sector in which the partition is located.

Abstract: The invention relates to the loading of an applet in a smart card (2a), with the aid of two loading programs, an in-loader (IL) stored in the card and an off-loader (OL), respectively. According to the invention, two specific communication protocol layers are provided, one in a terminal (1) that houses the card reader, and the other in the card. These layers include in particular intelligent agents that enable the card to offer a client/webserver and gateway or CGI function. The method includes at least one step during which an http request is sent to the card in order to address an HTML page, one step of retrieving parametrizing data carried by an HTML form, and one step of executing the second loading program (IL), by implementation of the CGI function, in order to load the applet.

Abstract: A method and device to control the access to a data memory space of a computer system by an active process stored in a program space of the system. When the active process attempts to perform an operation on a part of the data memory space the method or device controls the access to the part of the data memory space by comparing a dynamic attribute linked to the active process to an attribute linked to the part of the data memory space the process is attempting access. The value of the dynamic attribute is updated according to the present and previous status of the active process.

Abstract: A method to control access to a sector of a flash type memory of an electronic module. The method includes receiving a write request to write data to an area of a partition, wherein the partition is located within the sector and, prior to writing to the data, determining whether an owner of the data to be written has write access to the partition of the sector and permission to erase the entire sector in which the partition is located.

Abstract: The method to check module chaining in a modular software architecture located in an electronic unit with microprocessor comprising, apart from the microprocessor, a memory space, uses an identification, secured by the hardware, of the calling module. The invention also concerns an electronic unit with microprocessor designed to implement the above method.

Abstract: This invention concerns a method to control the access to objects (5) stored in a memory space of a computer system by a subject (3) stored in a program space of said system. The subject wants to perform an operation on said objects (5). The method according to the invention controls the access to said objects (5) via a dynamic attribute (8) linked to said subject (3) whose value is updated according to the present and previous status(es) of the subject. This invention also concerns the access control device implementing the method described above.

Abstract: The invention relates to a method for activating one (Ai) of the applications (Ai-An) of an on-board or embedded system, particularly of a chip card (2a) connected to a terminal (1) equipped with a reader, by means of a “web” browser. The terminal (1) and the chip card (2a) each comprise, in addition to the conventional protocol layers (101-102) corresponding to the ISO 7816 standards, a specific layer (13, 23a). The latter comprises intelligent agents (132, 231a1) for establishing two-way data exchange sessions, enabling the chip card (2a) to offer a “web” server functionality. In addition, the chip card (2a) comprises intelligent agents (ATS1-ATSn) called script translators that interact with the applications (Ai-An), making it possible to activate a selected application (Ai) using conventional commands corresponding to the ISO 7816 standards. In a variant of embodiment, provisions are made for a dynamic updating of the chip card (2a), particularly from the browser.

Abstract: The invention relates to the loading of an applet in a smart card (2a), with the aid of two loading programs, an in-loader (IL) stored in the card and an off-loader (OL), respectively. According to the invention, two specific communication protocol layers are provided, one in a terminal (1) that houses the card reader, and the other in the card. These layers include in particular intelligent agents that enable the card to offer a client/webserver and gateway or CGI function. The method includes at least one step during which an http request is sent to the card in order to address an HTML page, one step of retrieving parametrizing data carried by an HTML form, and one step of executing the second loading program (IL), by implementation of the CGI function, in order to load the applet.

Abstract: For the obtainment of a unique number identifier called a ticket indentifying a task or an event in a multi-node data processing system (SYS), a master node (Ny) for distributing the ticket in the system is designated, and it includes a ticket generator (TICKy:VALy, SESSy, COUNTy) whose address (TICK.sub.-- ID) is stored in a reference register (REF) of each node. When a node (Nx) requests a ticket, it reads the address (TICK.sub.-- ID) in this register and thus accesses the ticket generator of the master node (Ny). A backup or substitute node (Ns) can replace the master node (Ny) in case of a failure (TICK-MISS).

Abstract: In a multinode information system (SYS), a processor (Pxm) of a first node (Nx) emits a message of predetermined size (MESS) in the form of a write operation in the communication module (ISLx) of the first node and transmits it to the communication module (ISLy) of a second node (Ny), where it is stored in a queue of messages received (FIFO-MGT), in the order of their reception, then dequeued by a processor (Pyn) of the second node (Ny) in the form of a read operation in the communication module (ISLy) of this node so that the information contained in the message can be processed.

Abstract: The invention pertains to the information systems field, in which a system is constituted by several machines which, in order to exchange data, communicate with one another through serial links. The invention relates more specifically to a device for exchanging messages between two data processing machines by means of a bidirectional serial link (2).

Abstract: The process for exchanges between the levels in a hierarchy of memories comprising at least one intermediate level in the hierarchy linked to a higher level in the hierarchy and to a lower level in the hierarchy, with each level in the hierarchy being divided into memories (3, 5, 6) which are in turn divided into blocks (10) containing information (11) associated with addresses (Ad), with the blocks of the memories on the higher level and on the intermediate level in the hierarchy containing copies of the information held in the blocks at the corresponding addresses on the lower level in the hierarchy, and during a modification of a piece of information in a block (10.

Abstract: The conductor 15 to be connected to the doped region 12 of the substrate 11 has an edge 15a at which the laser beam 20 is aimed, regulated such as to definitively create a zone of low electrical resistance 19 in the dielectric layer 13 that separates the conductor from the doped region. The invention is particularly applicable to programming by laser of read only memories and defective integrated circuits with a view to correcting them.

Abstract: The state of conduction of an MOS transistor 11 is definitively controlled by a laser beam 21, by forming an electrical connection 22 between the gate 16 and the subjacent portion d of the source region 14 or drain region 15. The invention is applicable in particular to the correction (reconfiguration, redundancy) of integrated circuits and to the programming of integrated PROMs.

Abstract: The conductor 15 to be connected to the doped region 12 of the substrate 11 has an edge 15a at which the laser beam 20 is aimed, regulated such as to definitively create a zone of low electrical resistance 19 in the dielectric layer 13 that separates the conductor from the doped region. The invention is particularly applicable to programming by laser of read only memories and defective integrated circuits with a view to correcting them.

Abstract: A method for creating a programmable connection by a laser beam in superimposed conductors of an interconnect system of an integrated circuit is provided wherein each of the conductors is formed of a metal strip provided with an upper and a lower film of a material having a melting point substantially higher than a melting point of said metal strip. The conductors are separated by a dielectric layer and the upper conductor is covered by an insulating passivation layer. The connection is effected through an opening in the insulating layer, the upper conductor, the dielectric layer, and at least a portion of said lower conductor. The method for creating the connection consists of applying at least a first laser beam pulse to make an initial opening in at least said insulating layer; and selectively controlling one or more of the parameters of the laser beam, such as power, diameter, number of pulses and duration of pulses.

Abstract: A method of fabricating a resistor in a polycrystalline semiconductor material includes rendering the material conductive by a heavy doping implantation of ions which are electrically active with respect to the material. Ions which are electrically inactive, for example, argon ions, are then implanted in an area of the material with a concentration that is controlled to form a resistor having a desired resistance value. The method permits the precise and accurate control of the fabrication of load resistors for logic circuits within a very wide resistance range, and the resulting resistance values are a linear function of the concentration of the inactive ions.

Abstract: An integrated circuit is provided having super imposed metal strip conductor portions separated by dielectric layers, the conductor portions being provided with upper and lower films of a material having a higher melting temperature than that of the conductor material, the integrated circuit having connections linking predetermined superimposed conductor portions through the dielectric layers, the connections being made by joining beads formed in a laser beam programmed opening. A method for establishing a connection of this type is also provided which includes applying a laser beam to make an opening through an insulating layer, the upper conductor, the dielectric layer, and a portion of the lower conductor, and forming a connection in the opening by selectively controlling the power, the diameter, the number and duration of pulses of the laser beam such that beads are formed beginning at the two conductors which unite to form the connection.

Abstract: The invention enables precise and reliable adjustment of the resistance of a resistor formed in a zone (16) of monocrystalline semiconductor material (11) in spite of the presence of a density gradient of electrically active ions at the periphery of the zone, as a result of the implantation of ions of rare gases (+) in the zone. Furthermore, when the standard method of producing a resistor in a polycrystalline semiconductor material is used, implanting rare gas ions in the resistive zone enables precise and reliable adjustment of the resistance. The invention also maintains the dimensions of the initially resistive zone, despite later annealing, and is suitable for large-scale integration of circuits.