Patents by Inventor Alain Caron

Alain Caron has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9408240
    Abstract: There is disclosed a system and method for choosing between different Communication Initiation Request (CIR) channels in a mobile communications system when there are multiple CIR channels amongst which to choose. Additionally, there is disclosed a system and method for exploiting a Transmission Control Protocol (TCP) connection usage pattern that is characterized by periods of inactivity.
    Type: Grant
    Filed: August 30, 2006
    Date of Patent: August 2, 2016
    Assignee: Synchronica plc
    Inventors: Alain Caron, Sylvain Legault, Haraldur Thorkelsson, Felix-Etienne Trepanier, Teresa Hunkeler, Jean Regnier
  • Patent number: 9088416
    Abstract: A computing system, method and product comprising a server, a mobile device comprising a client interconnected with the server via a data network, the client identified by a credential which is unavailable to the client and an intermediate node interconnected to the client and the server via the data network wherein the credential is available to the intermediate node. Upon reception of a service request from the client at a first server address the server redirects the client to transmit the service request to a second server address via the intermediate node together with a token, wherein the intermediate node appends a credential identifying the client to the redirected service request and the token and relays the redirected service request, the token and the credential to the second server address.
    Type: Grant
    Filed: November 24, 2006
    Date of Patent: July 21, 2015
    Assignee: Synchronica plc
    Inventors: Nikolai Grigoriev, Haraldur Thorkelsson, Sylvain Legault, Alain Caron
  • Patent number: 8812597
    Abstract: There is described an interconnect hub for routing an Instant Message (IM) or related communication between a sending IM device in a first IM community and a recipient IM device in one of a plurality of potential second IM communities. The interconnect hub comprises a router for determining the destination of IM communications and routing the IM communications to the intended recipient, a search function for finding the service provider providing IM services to the user identifier, and a cache comprising a plurality of records associating user identifiers with corresponding service providers (mobile or Internet). When the IM communication is received by the interconnect hub, the router examines the recipient user identifier, accesses the cache keying on the recipient user identifier, retrieves the service provider associated with the recipient user identifier, and forwards the IM communication to the associated service provider for delivery to the intended recipient.
    Type: Grant
    Filed: February 19, 2008
    Date of Patent: August 19, 2014
    Assignee: Synchronica plc
    Inventors: Gwenael Le Bodic, Alain Caron, Jean Regnier, Manuel Laflamme
  • Patent number: 8629562
    Abstract: Techniques for modular chip fabrication are provided. In one aspect, a modular chip structure is provided. The modular chip structure comprises a substrate; a carrier platform attached to the substrate, the carrier platform comprising a plurality of conductive vias extending through the carrier platform; and a wiring layer on the carrier platform in contact with one or more of the conductive vias, wherein the wiring layer comprises one or more wiring levels and is configured to divide the carrier platform into a plurality of voltage islands; and chips, chip macros or at least one chip in combination with at least one chip macro assembled on the carrier platform.
    Type: Grant
    Filed: August 31, 2012
    Date of Patent: January 14, 2014
    Assignee: International Business Machines Corporation
    Inventors: Alain Caron, John Ulrich Knickerbocker
  • Publication number: 20120326321
    Abstract: Techniques for modular chip fabrication are provided. In one aspect, a modular chip structure is provided. The modular chip structure comprises a substrate; a carrier platform attached to the substrate, the carrier platform comprising a plurality of conductive vias extending through the carrier platform; and a wiring layer on the carrier platform in contact with one or more of the conductive vias, wherein the wiring layer comprises one or more wiring levels and is configured to divide the carrier platform into a plurality of voltage islands; and chips, chip macros or at least one chip in combination with at least one chip macro assembled on the carrier platform.
    Type: Application
    Filed: August 31, 2012
    Publication date: December 27, 2012
    Applicant: International Business Machines Corporation
    Inventors: Alain Caron, John Ulrich Knickerbocker
  • Patent number: 8288866
    Abstract: Techniques for modular chip fabrication are provided. In one aspect, a modular chip structure is provided. The modular chip structure comprises a substrate; a carrier platform attached to the substrate, the carrier platform comprising a plurality of conductive vias extending through the carrier platform; and a wiring layer on the carrier platform in contact with one or more of the conductive vias, wherein the wiring layer comprises one or more wiring levels and is configured to divide the carrier platform into a plurality of voltage islands; and chips, chip macros or at least one chip in combination with at least one chip macro assembled on the carrier platform.
    Type: Grant
    Filed: January 25, 2011
    Date of Patent: October 16, 2012
    Assignee: International Business Machines Corporation
    Inventors: Alain Caron, John Ulrich Knickerbocker
  • Publication number: 20110121456
    Abstract: Techniques for modular chip fabrication are provided. In one aspect, a modular chip structure is provided. The modular chip structure comprises a substrate; a carrier platform attached to the substrate, the carrier platform comprising a plurality of conductive vias extending through the carrier platform; and a wiring layer on the carrier platform in contact with one or more of the conductive vias, wherein the wiring layer comprises one or more wiring levels and is configured to divide the carrier platform into a plurality of voltage islands; and chips, chip macros or at least one chip in combination with at least one chip macro assembled on the carrier platform.
    Type: Application
    Filed: January 25, 2011
    Publication date: May 26, 2011
    Applicant: International Business Machines Corporation
    Inventors: Alain Caron, John Ulrich Knickerbocker
  • Patent number: 7892885
    Abstract: Techniques for modular chip fabrication are provided. In one aspect, a modular chip structure is provided. The modular chip structure comprises a substrate; a carrier platform attached to the substrate, the carrier platform comprising a plurality of conductive vias extending through the carrier platform; and a wiring layer on the carrier platform in contact with one or more of the conductive vias, wherein the wiring layer comprises one or more wiring levels and is configured to divide the carrier platform into a plurality of voltage islands; and chips, chip macros or at least one chip in combination with at least one chip macro assembled on the carrier platform.
    Type: Grant
    Filed: October 30, 2007
    Date of Patent: February 22, 2011
    Assignee: International Business Machines Corporation
    Inventors: Alain Caron, John Ulrich Knickerbocker
  • Patent number: 7741153
    Abstract: Modular chip integration and operation techniques are provided. In one aspect, a method of integrating chips, chip macros or at least one chip in combination with at least one chip macro is provided. The method comprises the following steps. The chips, chip macros or at least one chip in combination with at least one chip macro are assembled on a single carrier platform. One or more signal inputs and outputs are provided to each of the chips, chip macros or at least one chip in combination with at least one chip macro. One or more power and ground inputs and outputs are provided to each of the chips, chip macros or at least one chip in combination with at least one chip macro.
    Type: Grant
    Filed: October 30, 2007
    Date of Patent: June 22, 2010
    Assignee: International Business Machines Corporation
    Inventors: Alain Caron, John Ulrich Knickerbocker
  • Publication number: 20090108427
    Abstract: Techniques for modular chip fabrication are provided. In one aspect, a modular chip structure is provided. The modular chip structure comprises a substrate; a carrier platform attached to the substrate, the carrier platform comprising a plurality of conductive vias extending through the carrier platform; and a wiring layer on the carrier platform in contact with one or more of the conductive vias, wherein the wiring layer comprises one or more wiring levels and is configured to divide the carrier platform into a plurality of voltage islands; and chips, chip macros or at least one chip in combination with at least one chip macro assembled on the carrier platform.
    Type: Application
    Filed: October 30, 2007
    Publication date: April 30, 2009
    Applicant: International Business Machines Corporation
    Inventors: Alain Caron, John Ulrich Knickerbocker
  • Publication number: 20090111215
    Abstract: Modular chip integration and operation techniques are provided. In one aspect, a method of integrating chips, chip macros or at least one chip in combination with at least one chip macro is provided. The method comprises the following steps. The chips, chip macros or at least one chip in combination with at least one chip macro are assembled on a single carrier platform. One or more signal inputs and outputs are provided to each of the chips, chip macros or at least one chip in combination with at least one chip macro. One or more power and ground inputs and outputs are provided to each of the chips, chip macros or at least one chip in combination with at least one chip macro.
    Type: Application
    Filed: October 30, 2007
    Publication date: April 30, 2009
    Applicant: International Business Machines Corporation
    Inventors: Alain Caron, John Ulrich Knickerbocker
  • Publication number: 20080307517
    Abstract: A computing system, method and product comprising a server, a mobile device comprising a client interconnected with the server via a data network, the client identified by a credential which is unavailable to the client and an intermediate node interconnected to the client and the server via the data network wherein the credential is available to the intermediate node. Upon reception of a service request from the client at a first server address the server redirects the client to transmit the service request to a second server address via the intermediate node together with a token, wherein the intermediate node appends a credential identifying the client to the redirected service request and the token and relays the redirected service request, the token and the credential to the second server address.
    Type: Application
    Filed: November 24, 2006
    Publication date: December 11, 2008
    Inventors: Nikolai Grigoriev, Haraldur Thorkelsson, Sylvain Legault, Alain Caron
  • Publication number: 20080263170
    Abstract: There is disclosed a system and method for choosing between different Communication Initiation Request (CIR) channels in a mobile communications system when there are multiple CIR channels amongst which to choose. Additionally, there is disclosed a system and method for exploiting a Transmission Control Protocol (TCP) connection usage pattern that is characterized by periods of inactivity.
    Type: Application
    Filed: August 30, 2006
    Publication date: October 23, 2008
    Inventors: Alain Caron, Sylvain Legault, Haraldur Thorkelsson, Felix-Etienne Trepanier, Teresa Hunkeler, Jean Regnier
  • Publication number: 20080201441
    Abstract: There is described an interconnect hub for routing an Instant Message (IM) or related communication between a sending IM device in a first IM community and a recipient IM device in one of a plurality of potential second IM communities. The interconnect hub comprises a router for determining the destination of IM communications and routing the IM communications to the intended recipient, a search function for finding the service provider providing IM services to the user identifier, and a cache comprising a plurality of records associating user identifiers with corresponding service providers (mobile or Internet). When the IM communication is received by the interconnect hub, the router examines the recipient user identifier, accesses the cache keying on the recipient user identifier, retrieves the service provider associated with the recipient user identifier, and forwards the IM communication to the associated service provider for delivery to the intended recipient.
    Type: Application
    Filed: February 19, 2008
    Publication date: August 21, 2008
    Applicant: OZ Communications Inc.
    Inventors: Gwenael Le Bodic, Alain Caron, Jean Regnier, Manuel Laflamme
  • Patent number: 7146596
    Abstract: An integrated circuit chip having a contact layer that includes a plurality of Vdd, Vddx, ground and I/O contacts arranged in a generally radial pattern having diagonal and major axis symmetry and generally defining four quadrants. A multilayer X-Y power grid is located beneath the contact layer. A wiring layer is interposed between the contact layer and power grid to provide a well-behaved electrical transition between the generally radial Vdd, Vddx and ground contacts and the rectangular X-Y power grid. The interposed wiring layer includes concentric square rings of Vdd, Vddx and ground wires located alternatingly with one another. The Vddx wires are discontinuous between adjacent quadrants so that the magnitude of Vddx may be different in each quadrant of the chip if desired.
    Type: Grant
    Filed: August 29, 2003
    Date of Patent: December 5, 2006
    Assignee: International Business Machines Corporation
    Inventors: Thomas R. Bednar, Timothy W. Budell, Patrick H. Buffet, Alain Caron, James V. Crain, Jr., Douglas W. Kemerer, Donald S. Kent, Esmaeil Rahmati
  • Patent number: 7017128
    Abstract: The present invention relates to a method for optimization of a signal wire structure, providing concurrent optimization of a plurality of wire parameters, providing a plurality of wiring solutions, wherein each of said wiring solutions produces a wiring package having different wire parameters, providing an electronic package, determining the optimal wiring solutions for said electronic package; and producing an electronic package, using the optimized wiring package solutions. The resulting apparatus is also disclosed.
    Type: Grant
    Filed: December 17, 2003
    Date of Patent: March 21, 2006
    Assignee: International Business Machines Corporation
    Inventors: Jean Audet, Timothy W. Budell, Patrick H. Buffet, Alain Caron
  • Publication number: 20050050505
    Abstract: An integrated circuit chip (104) having a contact layer (136) that includes a plurality of Vdd, Vddx, ground and I/O contacts (116, 120, 124, 128) arranged in a generally radial pattern having diagonal and major axis symmetry and generally defining four quadrants. An X-Y power grid (140) is located beneath the contact layer and includes metal layers (LM?) each having a plurality of wires (68) extending in one direction. The direction of the wires alternates from one metal layer to the next adjacent metal layer. A wiring layer (IM) is interposed between the contact layer and power grid layers to provide a well-behaved electrical transition between the generally radial Vdd, Vddx and ground contacts and the rectangular X-Y power grid. The interposed wiring layer includes concentric square rings of Vdd, Vddx and ground wires (144, 148, 152) located alternatingly with one another.
    Type: Application
    Filed: August 29, 2003
    Publication date: March 3, 2005
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Thomas Bednar, Timothy Budell, Patrick Buffet, Alain Caron, James Crain, Douglas Kemerer, Donald Kent, Esmaeil Rahmati
  • Publication number: 20040132229
    Abstract: The present invention relates to a method for optimization of a signal wire structure, providing concurrent optimization of a plurality of wire parameters, providing a plurality of wiring solutions, wherein each of said wiring solutions produces a wiring package having different wire parameters, providing an electronic package, determining the optimal wiring solutions for said electronic package; and producing an electronic package, using the optimized wiring package solutions. The resulting apparatus is also disclosed.
    Type: Application
    Filed: December 17, 2003
    Publication date: July 8, 2004
    Inventors: Jean Audet, Timothy W. Budell, Patrick H. Buffet, Alain Caron
  • Patent number: 6703706
    Abstract: An electrical structure to optimize a signal wire structure. The electrical structure provides concurrent optimization of a plurality of wire parameters, providing a plurality of wiring solutions, wherein each of said wiring solutions produces a wiring package having different wire parameters, providing an electronic package, determining the optimal wiring solutions for said electronic package; and producing an electronic package, using the optimized wiring package solutions. The resulting apparatus is also disclosed.
    Type: Grant
    Filed: January 8, 2002
    Date of Patent: March 9, 2004
    Assignee: International Business Machines Corporation
    Inventors: Jean Audet, Timothy W. Budell, Patrick H. Buffet, Alain Caron
  • Publication number: 20030127728
    Abstract: The present invention relates to a method for optimization of a signal wire structure, providing concurrent optimization of a plurality of wire parameters, providing a plurality of wiring solutions, wherein each of said wiring solutions produces a wiring package having different wire parameters, providing an electronic package, determining the optimal wiring solutions for said electronic package; and producing an electronic package, using the optimized wiring package solutions. The resulting apparatus is also disclosed.
    Type: Application
    Filed: January 8, 2002
    Publication date: July 10, 2003
    Applicant: International Business Machines Corporation
    Inventors: Jean Audet, Timothy W. Budell, Patrick H. Buffet, Alain Caron