Abstract: A structural analysis tool automatically detects complex handshake mechanisms for controlling data transfers between clock-domain crossings. The structural analysis tool may also verify the correctness of the handshake mechanism.

Abstract: Names of signals are propagated through a circuit design inside tuples, with each tuple including at least a signal name and a sequential depth. A tuple being propagated is added to a list of zero or more tuples currently identified with a circuit element, unless a tuple of the same signal name is already present in the list. If already present in the list, then propagation of that tuple is stopped. Propagation of tuples may also be stopped depending on user-defined limits, e.g. on sequential depth. Tuple propagation may be used, depending on the embodiment, to identify features of interest in the circuit design, e.g. (a) a point of convergence of differently clocked signals, (b) location of gray coders, and (c) location of synchronizers, by appropriate identification of circuit elements from which tuple propagation is to start, and by appropriate checks on lists of tuples that result from tuple propagation.

Abstract: A method and computer system for automatically determining test patterns for a netlist having multiple clocks and sequential circuits. The invention utilizes a static model of a sequential circuit and models the sequential circuit having multiple clock signals (e.g., one model is used for all multiple clock signals). The multiple clock signals include primary clock input signals and internal clock signals. The clock signals can be gated or dual edge. The invention makes use of the "iterative array representation of sequential circuits" (IAR) model for automatic test pattern generation (ATPG) but utilizes a static sequential circuit model. The invention receives user defined input clock signal waveforms and determines a cycle of clocks based thereon that statically represents all waveforms over time. The cycle of clocks is divided into frames where each frame contains stable clock values.