Patents by Inventor Alain Inard
Alain Inard has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230408738Abstract: Methods of manufacture of an optical diffuser. In one embodiment, an optical diffuser is formed by providing a wafer including a silicon slice of which an upper face is covered with a first layer made of a first material itself covered with a second layer made of a second selectively etchable material with respect to the first material. The method further includes forming openings in the second layer extending up to the first layer and filling the openings in the second layer with a third material. The method yet further includes bonding a glass substrate to the wafer on the side of its upper face and removing the silicon slice.Type: ApplicationFiled: July 28, 2023Publication date: December 21, 2023Applicant: STMicroelectronics (Crolles 2) SASInventors: Vincent FARYS, Alain INARD, Olivier NOBLANC
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Publication number: 20230361151Abstract: In accordance with an embodiment, a method for manufacturing an optical device on a support substrate includes: forming first microlens structures on the support substrate using a first photolithography process such that the first microlens structures are separated from one another; deforming the first microlens structures so as to give the first microlens structures a curved shape, wherein the first microlens structures are separated from one another by spacer regions after deformation; forming second microlens structures substrate using a second photolithography process such that the second microlens structures extend over the first microlens structures; and deforming the second microlens structures such that the second microlens structures have a curved form matching the curved shape of the first microlens structures and extend partly into the spacer regions between the first microlens structures.Type: ApplicationFiled: April 11, 2023Publication date: November 9, 2023Inventors: Jonathan Fantuz, Alain Inard, Didier Dutartre
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Publication number: 20230352513Abstract: The present description concerns a manufacturing method comprising the following steps: providing a silicon substrate having a via penetrating into the substrate from its front surface and comprising a silicon conductive core and a silicon oxide insulating sheath; etching the substrate from its rear surface, selectively over the sheath so that a portion of said at least one via protrudes from the rear surface; depositing a silicon oxide insulating layer on the rear surface; polishing the insulating layer to expose the core while leaving in place a portion of the thickness of the insulating layer; and forming a conductive electrode in contact with the core.Type: ApplicationFiled: April 19, 2023Publication date: November 2, 2023Applicant: STMicroelectronics (Crolles 2) SASInventors: Alain INARD, Emmanuel JOSSE
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Patent number: 11754758Abstract: Methods of manufacture of an optical diffuser. In one embodiment, an optical diffuser is formed by providing a wafer including a silicon slice of which an upper face is covered with a first layer made of a first material itself covered with a second layer made of a second selectively etchable material with respect to the first material. The method further includes forming openings in the second layer extending up to the first layer and filling the openings in the second layer with a third material. The method yet further includes bonding a glass substrate to the wafer on the side of its upper face and removing the silicon slice.Type: GrantFiled: September 22, 2021Date of Patent: September 12, 2023Assignee: STMicroelectronics (Crolles 2) SASInventors: Vincent Farys, Alain Inard, Olivier Noblanc
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Publication number: 20220011479Abstract: Methods of manufacture of an optical diffuser. In one embodiment, an optical diffuser is formed by providing a wafer including a silicon slice of which an upper face is covered with a first layer made of a first material itself covered with a second layer made of a second selectively etchable material with respect to the first material. The method further includes forming openings in the second layer extending up to the first layer and filling the openings in the second layer with a third material. The method yet further includes bonding a glass substrate to the wafer on the side of its upper face and removing the silicon slice.Type: ApplicationFiled: September 22, 2021Publication date: January 13, 2022Applicant: STMicroelectronics (Crolles 2) SASInventors: Vincent FARYS, Alain INARD, Olivier NOBLANC
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Publication number: 20220005850Abstract: An optoelectronic device includes a photodiode. At least a portion of an active area of the photodiode is separated from a neighboring photodiode by a first wall including a conductive core and an insulating sheath and by a second optical insulation wall. The first wall and second optical insulation wall further extend parallel to each other and separate the active area from a memory area of the photodiode.Type: ApplicationFiled: June 30, 2021Publication date: January 6, 2022Applicant: STMicroelectronics (Crolles 2) SASInventors: Alain INARD, Marios BARLAS
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Patent number: 11150388Abstract: Methods of manufacture of an optical diffuser. In one embodiment, an optical diffuser is formed by providing a wafer including a silicon slice of which an upper face is covered with a first layer made of a first material itself covered with a second layer made of a second selectively etchable material with respect to the first material. The method further includes forming openings in the second layer extending up to the first layer and filling the openings in the second layer with a third material. The method yet further includes bonding a glass substrate to the wafer on the side of its upper face and removing the silicon slice.Type: GrantFiled: May 31, 2017Date of Patent: October 19, 2021Assignee: STMICROELECTRONICS (CROLLES 2) SASInventors: Vincent Farys, Alain Inard, Olivier Noblanc
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Publication number: 20180143357Abstract: Methods of manufacture of an optical diffuser. In one embodiment, an optical diffuser is formed by providing a wafer including a silicon slice of which an upper face is covered with a first layer made of a first material itself covered with a second layer made of a second selectively etchable material with respect to the first material. The method further includes forming openings in the second layer extending up to the first layer and filling the openings in the second layer with a third material. The method yet further includes bonding a glass substrate to the wafer on the side of its upper face and removing the silicon slice.Type: ApplicationFiled: May 31, 2017Publication date: May 24, 2018Inventors: Vincent FARYS, Alain INARD, Olivier NOBLANC
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Publication number: 20080150061Abstract: A system and method for producing optical microlenses on a front layer of a semiconductor device. The system and method includes depositing a final layer of a suitable material on a front layer of a semiconductor device. The system and method could also include producing crossed grooves in the final layer down to the front layer forming spaced-apart pads and then treating the pads so that the pads exhibit a substantially domed shape. In addition, an apparatus to produce optical microlenses could include a chamber to accommodate the semiconductor device and a heating element to heat the chamber. The apparatus could also include an ultraviolet radiation emitter associated with the chamber. The apparatus could further include a plasma generator configured to act on the front layer. Finally, a semiconductor device with optical microlenses which includes some sort of anti-fusion means between the microlenses is also provided.Type: ApplicationFiled: December 7, 2007Publication date: June 26, 2008Applicant: STMICROELECTRONICS SAInventors: Yannick Sanchez, Nicolas Hotellier, Alain Inard
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Publication number: 20070017902Abstract: A method for the treatment of copper surfaces on a semiconductor wafer for the removal of carbonaceous residues, these being obtained during a chemical-mechanical polishing operation, includes a water rinsing of the wafer followed by a chemical rinsing of the wafer using a solution containing a corrosion inhibitor and an organic acid.Type: ApplicationFiled: July 22, 2005Publication date: January 25, 2007Applicant: STMicroelectronics S.A.Inventors: Sebastien Petitdidier, Alain Inard
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Patent number: 7064053Abstract: A process for fabricating an integrated electrical circuit comprises the formation and then the removal of conducting inserts. Components of the electrical circuit are incorporated into insulating materials superposed on top of a substrate. The process makes it possible to provide an exclusion volume around certain components sensitive to electrostatic coupling, while giving each insulating material a planar surface at the end of a polishing step.Type: GrantFiled: August 29, 2003Date of Patent: June 20, 2006Assignees: STMicroelectronics SA, Koninklijke Philips Electronics N.V.Inventors: Srdjan Kordic, Alain Inard, Céline Roussel, Philippe Gayet
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Patent number: 6917116Abstract: An electrical connection device between two conducting tracks of an integrated circuit comprises a first conducting connection between the two tracks. The device further comprises an additional interface of one of the two tracks, different from the interface of the track with the first connection and different from the lateral interface of the track with an insulating material parallel to the flow direction of the electric current in the track. The additional interface is placed at some distance from the first connection which is substantially less than the width of the track. The additional interface may be obtained by placing at least a second conducting connection between the two tracks, or by placing at least one rib in the track, or by placing notches on at least one of the faces of the track.Type: GrantFiled: November 14, 2003Date of Patent: July 12, 2005Assignees: STMicroelectronics SA, Koninklike Philips ElectronicsInventors: Srdjan Kordic, Céline Roussel, Alain Inard
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Publication number: 20040140565Abstract: An electrical connection device between two conducting tracks of an integrated circuit comprises a first conducting connection between the two tracks. The device further comprises an additional interface of one of the two tracks, different from the interface of the track with the first connection and different from the lateral interface of the track with an insulating material parallel to the flow direction of the electric current in the track. The additional interface is placed at some distance from the first connection which is substantially less than the width of the track. The additional interface may be obtained by placing at least a second conducting connection between the two tracks, or by placing at least one rib in the track, or by placing notches on at least one of the faces of the track.Type: ApplicationFiled: November 14, 2003Publication date: July 22, 2004Applicants: STMICROELECTRONICS SA, KONINKLIJKE PHILIPS ELECTRONICS N.V.Inventors: Srdjan Kordic, Celine Roussel, Alain Inard
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Patent number: 6746935Abstract: A method of forming an active area surrounded with an insulating area in a semiconductor substrate, including the steps of forming in the substrate a trench surrounding an active area; filling the trench with an insulating material to form an edge extending beyond the substrate surface at the periphery of the active area; forming a spacer at the periphery of said edge; and implanting a dopant, whereby the implantation in the area located under the spacer is less deep than in the rest of the active area.Type: GrantFiled: March 29, 2001Date of Patent: June 8, 2004Assignees: STMicroelectronics S.A., Koninklijke Philips Electronics N.V.Inventors: Walter De Coster, Meindert Lunenborg, Alain Inard, Jos Guelen
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Publication number: 20040087140Abstract: A process for fabricating an integrated electrical circuit comprises the formation and then the removal of conducting inserts. Components of the electrical circuit are incorporated into insulating materials superposed on top of a substrate. The process makes it possible to provide an exclusion volume around certain components sensitive to electrostatic coupling, while giving each insulating material a planar surface at the end of a polishing step.Type: ApplicationFiled: August 29, 2003Publication date: May 6, 2004Inventors: Srdjan Kordic, Alain Inard, Celine Roussel, Philippe Gayet
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Patent number: 6561839Abstract: The formation of the isolating region includes ion implantation in the voluminal part, followed by annealing of said implanted voluminal part (7) of the substrate (1).Type: GrantFiled: August 21, 2001Date of Patent: May 13, 2003Assignee: Koninklijke Philips Electronics N.V.Inventors: Meindert Martin Lunenborg, Walter Jan August De Coster, Alain Inard, Franck Arnaud
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Patent number: 6518114Abstract: The invention relates to a method of forming an insulating zone (14) around an active zone (12) in a semiconductor substrate, which method includes the following steps: forming a groove around an active zone (12) in the substrate; and filling the groove with a first material so as to form around the active zone an insulating zone (14) which projects from the surface of the substrate and forms a vertical protrusion at its periphery; and blunting the angle of the protrusion of the insulating zone at the periphery at the active zone. The invention further relates to a semiconductor device formed using said method.Type: GrantFiled: March 23, 2001Date of Patent: February 11, 2003Assignee: U.S. Philips CorporationInventors: Alain Inard, Dominique Cecile Zulian, Didier Levy, Meindert Martin Lunenborg, Walter Jan August De Coster, Jean Claude Oberlin
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Publication number: 20020048899Abstract: The formation of the isolating region includes ion implantation in the voluminal part, followed by annealing of said implanted voluminal part (7) of the substrate (1).Type: ApplicationFiled: August 21, 2001Publication date: April 25, 2002Inventors: Meindert Martin Lunenborg, Walter Jan August De Coster, Alain Inard, Franck Arnaud
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Publication number: 20010045612Abstract: The invention relates to a method of forming an insulating zone (14) around an active zone (12) in a semiconductor substrate, which method includes the following steps:Type: ApplicationFiled: March 23, 2001Publication date: November 29, 2001Inventors: Alain Inard, Dominique Cecile Zulian, Didier Levy, Meindert Martin Lunenborg, Walter Jan August De Coster, Jean Claude Oberlin