Patents by Inventor Alain Michel Breton

Alain Michel Breton has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Dynamically configurable memory system
    Patent number: 8589650
    Abstract: In a digital system with a processor coupled to a paged memory system, the memory system may be dynamically configured using a memory compaction manager in order to allow portions of the memory to be placed in a low power mode. As applications are executed by the processor, program instructions are copied from a non-volatile memory coupled to the processor into pages of the paged memory system under control of an operating system. Pages in the paged memory system that are not being used by the processor are periodically identified. The paged memory system is compacted by copying pages that are being used by the processor from a second region of the paged memory into a first region of the paged memory. The second region may be placed in a low power mode when it contains no pages that are being used by the processor.
    Type: Grant
    Filed: June 15, 2010
    Date of Patent: November 19, 2013
    Assignee: Texas Instruments Incorporated
    Inventors: Satoshi Yokoya, Philippe Gentric, Alain Michel Breton, Steven Charles Goss, Steven Richard Jahnke
  • Dynamically Configurable Memory System
    Publication number: 20110283071
    Abstract: In a digital system with a processor coupled to a paged memory system, the memory system may be dynamically configured using a memory compaction manager in order to allow portions of the memory to be placed in a low power mode. As applications are executed by the processor, program instructions are copied from a non-volatile memory coupled to the processor into pages of the paged memory system under control of an operating system. Pages in the paged memory system that are not being used by the processor are periodically identified. The paged memory system is compacted by copying pages that are being used by the processor from a second region of the paged memory into a first region of the paged memory. The second region may be placed in a low power mode when it contains no pages that are being used by the processor.
    Type: Application
    Filed: June 15, 2010
    Publication date: November 17, 2011
    Inventors: Satoshi Yokoya, Philippe Gentric, Alain Michel Breton, Steven Charles Goss, Steven Richard Jahnke