Abstract: The invention relates to a device for blockwise estimation of motion. This device includes on the one hand a matrix array (300) for calculating an error function, the said array including storage elements (S, 406, 407) for plural blocks (a, a') of current pixels and means (403) for switching between the storage elements corresponding to the various blocks and on the other hand a memory (801) for feeding the said array with pixels of a search window, linked to the said array.The device according to the invention is characterized in thatthe said memory (801) is a random access memory,the said memory contains a band of the search window corresponding to the entirety of the current blocks stored in the array (300),the said device including means (812) for read-addressing partial sections of the said band of the memory as a function of the block processed (a, a') by the said array, the said sections being introduced column by column into the said array.

Abstract: A decimation device for digital data sequences includes a multiplexer mounted in cascade with a calculator producing, alternately, during a first calculation cycle, the mean M.sub.i of at least two data sequences representing the pixels P(i,j) and P(i,j+1) in a line L.sub.i, and during a following calculation cycle, the mean M.sub.c. The mean M.sub.c is composed of the mean M.sub.i and of an intermediate sequence previously calculated and stored in a storage register arranged between an output for the calculation stage and at least one of the inputs to the multiplexer. The intermediate sequence represents the mean M.sub.i-1 of at least two data sequences representing pixels P(i-1,j) and P(i-1,j+1) in a line L.sub.i-1, where i varies from 0 to N-1 and j varies from 0 to M-1.

Abstract: A method of processing data in matrix arrays in a motion estimation system is characterized in that each array (803, 804) performing a calculation of distortion (Err) for a block of pixels (1, 2) of a current image, at least two arrays (803, 804) being arranged in series performing the calculations for at least two adjacent blocks (1, 2) of the said current image, the reference window corresponding to the entirety of these blocks being introduced in bands of pixels into the first of the said arrays (803) and propagating from array to array in the said series of arrays, the allocation of the blocks (1, 2) to the arrays and the direction of introduction of the band into the arrays being such that the last part (c, respectively A) of the band introduced into the array corresponds to a part of the window of the block (2, respectively 1) allocated to the first of the arrays (803).

Abstract: The disclosure concerns a device for estimation of movement by block matching in an image compression system based on blocks, characterized in that it comprises N lines.times.M columns of means of calculation of an error function between two values, N.times.M means of memorization of values representing the block whose movement is to be estimated, N.times.M means of memorization of values representing a block of a reference window, the two means of memorization being linked respectively to the means of calculation, M means of adding that totalize simultaneously the values of the error function for a column of N elements of calculation. The invention is applicable to image compression.

Abstract: A method of selecting motion vectors in a motion estimation system involves calculating values of an evaluation function. Each evaluation function value corresponds to a block of pixels of a reference window with respect to a current block of pixels and the relative position of the blocks is described by a motion vector. The method also involves determining the smallest value of the evaluation function and comparing the norms of the vectors associated with the smallest value. The vector having the smallest norm is selected from the associated motion vectors.

Abstract: A circuit for squaring a binary number X of n bits, x.sub.0 to x.sub.n-1, includes pre-processing circuits to form a group of all the products x.sub.i y.sub.j of the bits of number X, where i and j vary between 0 and n-1 such that i.ltoreq.j. The outputs of the pre-processing circuits provide words such that each word is formed by a succession, as complete as possible, of products selected among the products remaining from the group of products after forming the preceding word, each product x.sub.i y.sub.j of this succession being affected with a weight i+j+1 of the word if i is different from j, or with a weight 2i if i=j. Adders are connected to sum the words as the square of the number X.