Abstract: A logic device has address decoding logic for receiving an address to be decoded, for performing address decode operations and for providing current address decode operation results, an address range register for storing the address range of a previously decoded address, address comparing logic for comparing the address of the address to be decoded and the address range of the previously decoded address and selecting logic for bypassing a current address decode operation if the address of the address to be decoded is within the address range of the previously decoded address. The device may further have an address decode results register for storing the results of a previous address decode operation, wherein the selecting logic selects the results of the previous address decode operation stored in the address decode results register if the current address decode operation is bypassed.