Patents by Inventor Alan B. Botula

Alan B. Botula has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200027973
    Abstract: An approach for heat dissipation in integrated circuit devices is provided. A method includes forming an isolation layer on an electrically conductive feature of an integrated circuit device. The method also includes forming an electrically conductive layer on the isolation layer.
    Type: Application
    Filed: September 30, 2019
    Publication date: January 23, 2020
    Inventors: Alan B. BOTULA, Max L. LIFSON, James A. SLINKMAN, Theodore G. VAN KESSEL, Randy L. WOLF
  • Publication number: 20190363182
    Abstract: An approach for heat dissipation in integrated circuit devices is provided. A method includes forming an isolation layer on an electrically conductive feature of an integrated circuit device. The method also includes forming an electrically conductive layer on the isolation layer. The method additionally includes forming a plurality of nanowire structures on a surface of the electrically conductive layer.
    Type: Application
    Filed: August 7, 2019
    Publication date: November 28, 2019
    Inventors: Alan B. BOTULA, Max L. LIFSON, James A. SLINKMAN, Theodore G. VAN KESSEL, Randy L. WOLF
  • Publication number: 20180331207
    Abstract: An approach for heat dissipation in integrated circuit devices is provided. A method includes forming an isolation layer on an electrically conductive feature of an integrated circuit device. The method also includes forming an electrically conductive layer on the isolation layer.
    Type: Application
    Filed: July 10, 2018
    Publication date: November 15, 2018
    Inventors: Alan B. BOTULA, Max L. LIFSON, James A. SLINKMAN, Theodore G. VAN KESSEL, Randy L. WOLF
  • Patent number: 10109553
    Abstract: An approach for heat dissipation in integrated circuit devices is provided. A method includes forming an isolation layer on an electrically conductive feature of an integrated circuit device. The method also includes forming an electrically conductive layer on the isolation layer. The method additionally includes forming a plurality of nanowire structures on a surface of the electrically conductive layer.
    Type: Grant
    Filed: March 28, 2017
    Date of Patent: October 23, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Alan B. Botula, Max L. Lifson, James A. Slinkman, Theodore G. Van Kessel, Randy L. Wolf
  • Publication number: 20180294346
    Abstract: An approach for heat dissipation in integrated circuit devices is provided. A method includes forming an isolation layer on an electrically conductive feature of an integrated circuit device. The method also includes forming an electrically conductive layer on the isolation layer. The method additionally includes forming a plurality of nanowire structures on a surface of the electrically conductive layer.
    Type: Application
    Filed: June 15, 2018
    Publication date: October 11, 2018
    Inventors: Alan B. BOTULA, Max L. LIFSON, James A. SLINKMAN, Theodore G. VAN KESSEL, Randy L. WOLF
  • Patent number: 10068827
    Abstract: An approach for heat dissipation in integrated circuit devices is provided. A method includes forming an isolation layer on an electrically conductive feature of an integrated circuit device. The method also includes forming an electrically conductive layer on the isolation layer. The method additionally includes forming a plurality of nanowire structures on a surface of the electrically conductive layer.
    Type: Grant
    Filed: January 9, 2017
    Date of Patent: September 4, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Alan B. Botula, Max L. Lifson, James A. Slinkman, Theodore G. Van Kessel, Randy L. Wolf
  • Patent number: 9847415
    Abstract: A semiconductor structure and method of manufacture and, more particularly, a field effect transistor that has a body contact and method of manufacturing the same is provided. The structure includes a device having a raised source region of a first conductivity type and an active region below the raised source region extending to a body of the device. The active region has a second conductivity type different than the first conductivity type. A contact region is in electric contact with the active region. The method includes forming a raised source region over an active region of a device and forming a contact region of a same conductivity type as the active region, wherein the active region forms a contact body between the contact region and a body of the device.
    Type: Grant
    Filed: October 24, 2014
    Date of Patent: December 19, 2017
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Alan B. Botula, Alvin J. Joseph, Stephen E. Luce, John J. Pekarik, Yun Shi
  • Publication number: 20170200665
    Abstract: An approach for heat dissipation in integrated circuit devices is provided. A method includes forming an isolation layer on an electrically conductive feature of an integrated circuit device. The method also includes forming an electrically conductive layer on the isolation layer.
    Type: Application
    Filed: March 28, 2017
    Publication date: July 13, 2017
    Inventors: Alan B. BOTULA, Max L. LIFSON, James A. SLINKMAN, Theodore G. VAN KESSEL, Randy L. WOLF
  • Patent number: 9704978
    Abstract: An approach for heat dissipation in integrated circuit devices is provided. A method includes forming an isolation layer on an electrically conductive feature of an integrated circuit device. The method also includes forming an electrically conductive layer on the isolation layer. The method additionally includes forming a plurality of nanowire structures on a surface of the electrically conductive layer.
    Type: Grant
    Filed: March 18, 2016
    Date of Patent: July 11, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Alan B. Botula, Max L. Lifson, James A. Slinkman, Theodore G. Van Kessel, Randy L. Wolf
  • Patent number: 9666701
    Abstract: An approach for heat dissipation in integrated circuit devices is provided. A method includes forming an isolation layer on an electrically conductive feature of an integrated circuit device. The method also includes forming an electrically conductive layer on the isolation layer. The method additionally includes forming a plurality of nanowire structures on a surface of the electrically conductive layer.
    Type: Grant
    Filed: March 18, 2016
    Date of Patent: May 30, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Alan B. Botula, Max L. Lifson, James A. Slinkman, Theodore G. Van Kessel, Randy L. Wolf
  • Publication number: 20170117206
    Abstract: An approach for heat dissipation in integrated circuit devices is provided. A method includes forming an isolation layer on an electrically conductive feature of an integrated circuit device. The method also includes forming an electrically conductive layer on the isolation layer. The method additionally includes forming a plurality of nanowire structures on a surface of the electrically conductive layer.
    Type: Application
    Filed: January 9, 2017
    Publication date: April 27, 2017
    Inventors: Alan B. BOTULA, Max L. LIFSON, James A. SLINKMAN, Theodore G. VAN KESSEL, Randy L. WOLF
  • Patent number: 9601606
    Abstract: An approach for heat dissipation in integrated circuit devices is provided. A method includes forming an isolation layer on an electrically conductive feature of an integrated circuit device. The method also includes forming an electrically conductive layer on the isolation layer. The method additionally includes forming a plurality of nanowire structures on a surface of the electrically conductive layer.
    Type: Grant
    Filed: January 8, 2016
    Date of Patent: March 21, 2017
    Assignee: International Business Machines Corporation
    Inventors: Alan B. Botula, Max L. Lifson, James A. Slinkman, Theodore G. Van Kessel, Randy L. Wolf
  • Patent number: 9530711
    Abstract: An approach for sinking heat from a transistor is provided. A method includes forming a substrate contact extending from a first portion of a silicon-on-insulator (SOI) island to a substrate. The method also includes forming a transistor in a second portion of the SOI island. The method further includes electrically isolating the substrate contact from the transistor by doping the first portion of the SOI island.
    Type: Grant
    Filed: May 19, 2015
    Date of Patent: December 27, 2016
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Alan B. Botula, Alvin J. Joseph, James A. Slinkman, Randy L. Wolf
  • Patent number: 9472570
    Abstract: Approaches for body contacted transistors are provided. A method of manufacturing a semiconductor structure includes forming a field effect transistor (FET) including a channel and a gate. The method also includes forming a diode that is electrically connected between the channel and the gate, wherein the diode and channel are contained in a same layer of material.
    Type: Grant
    Filed: February 18, 2014
    Date of Patent: October 18, 2016
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Alan B. Botula, Randy L. Wolf
  • Publication number: 20160204048
    Abstract: An approach for heat dissipation in integrated circuit devices is provided. A method includes forming an isolation layer on an electrically conductive feature of an integrated circuit device. The method also includes forming an electrically conductive layer on the isolation layer.
    Type: Application
    Filed: March 18, 2016
    Publication date: July 14, 2016
    Inventors: ALAN B. BOTULA, MAX L. LIFSON, JAMES A. SLINKMAN, THEODORE G. VAN KESSEL, RANDY L. WOLF
  • Publication number: 20160204233
    Abstract: An approach for heat dissipation in integrated circuit devices is provided. A method includes forming an isolation layer on an electrically conductive feature of an integrated circuit device. The method also includes forming an electrically conductive layer on the isolation layer.
    Type: Application
    Filed: March 18, 2016
    Publication date: July 14, 2016
    Inventors: ALAN B. BOTULA, MAX L. LIFSON, JAMES A. SLINKMAN, THEODORE G. VAN KESSEL, RANDY L. WOLF
  • Publication number: 20160126158
    Abstract: An approach for heat dissipation in integrated circuit devices is provided. A method includes forming an isolation layer on an electrically conductive feature of an integrated circuit device. The method also includes forming an electrically conductive layer on the isolation layer.
    Type: Application
    Filed: January 8, 2016
    Publication date: May 5, 2016
    Inventors: Alan B. BOTULA, Max L. LIFSON, James A. SLINKMAN, Theodore G. VAN KESSEL, Randy L. WOLF
  • Patent number: 9324628
    Abstract: An approach for heat dissipation in integrated circuit devices is provided. A method includes forming an isolation layer on an electrically conductive feature of an integrated circuit device. The method also includes forming an electrically conductive layer on the isolation layer. The method additionally includes forming a plurality of nanowire structures on a surface of the electrically conductive layer.
    Type: Grant
    Filed: February 25, 2014
    Date of Patent: April 26, 2016
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Alan B. Botula, Max L. Lifson, James A. Slinkman, Theodore G. Van Kessel, Randy L. Wolf
  • Patent number: 9257324
    Abstract: A substrate includes a first region having a first resistivity, for optimizing a field effect transistor, a second region having a second resistivity, for optimizing an npn subcollector of a bipolar transistor device and triple well, a third region having a third resistivity, with a high resistivity for a passive device, a fourth region, substantially without implantation, to provide low perimeter capacitance for devices.
    Type: Grant
    Filed: March 31, 2014
    Date of Patent: February 9, 2016
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Alan B. Botula, Renata Camillo-Castillo, James S. Dunn, Jeffrey P. Gambino, Douglas B. Hershberger, Alvin J. Joseph, Robert M. Rassel, Mark E. Stidham
  • Patent number: 9214561
    Abstract: An integrated recessed thin body field effect transistor (FET) and methods of manufacture are disclosed. The method includes recessing a portion of a semiconductor material. The method further includes forming at least one gate structure within the recessed portion of the semiconductor material.
    Type: Grant
    Filed: June 27, 2013
    Date of Patent: December 15, 2015
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Michel J. Abou-Khalil, Alan B. Botula, Mark D. Jaffe, Alvin J. Joseph, James A. Slinkman