Abstract: Systems and methods for dynamically sizing inter-kernel communication channels implemented on an integrated circuit (IC) are provided. Implementation characteristics of the channels, predication, and kernel scheduling imbalances may factor into properly sizing the channels for self-synchronization, resulting in optimized steady-state throughput.

Abstract: Systems and methods for dynamically sizing inter-kernel communication channels implemented on an integrated circuit (IC) are provided. Implementation characteristics of the channels, predication, and kernel scheduling imbalances may factor into properly sizing the channels for self-synchronization, resulting in optimized steady-state throughput.

Abstract: Systems and methods for dynamically sizing inter-kernel communication channels implemented on an integrated circuit (IC) are provided. Implementation characteristics of the channels, predication, and kernel scheduling imbalances may factor into properly sizing the channels for self-synchronization, resulting in optimized steady-state throughput.

Abstract: The present embodiments relate to interface circuitry between a serial interface circuit and an array of processing elements in an integrated circuit. The interface circuitry may include a daisy chain of feeder circuits and a daisy chain of drain circuits. If desired, the interface circuitry may include multiple daisy chains of feeder circuits and/or multiple daisy chains of drain circuits. These multiple daisy chains of feeder circuits and drains circuits may be coupled in parallel, respectively. In some embodiments, the interface circuitry may include synchronization circuitry that is coupled between the daisy chains of drain circuits and the serial interface circuit. Pipeline register stages between feeder circuits and/or between drain circuits may enable the placement of the feeder circuits and/or the drain circuits spatially close to the processing elements of the array of processing elements.

Abstract: A method for designing a system on a target device includes generating a scheduled netlist and a hardware description language (HDL) of the system from a computer language description of the system. An area report is generated prior to HDL compilation, based on estimates from the scheduled netlist, that identifies resources from the target device required to implement portions of the computer language description of the system.

Abstract: Systems and methods according to these exemplary embodiments provide for methods and systems related to optical current sensors used to monitor standby power transformers, specifically fiber optical current and voltage sensors and, more particularly, to applications involving filters for use in such sensors, such as frequency tracking comb filters. According to one embodiment, a method for monitoring a connection condition of a stand by power transformer includes the steps of measuring a current flowing through a high voltage side of the standby power transformer using at least one optical current sensor disposed proximate to a current flow path of the high voltage side, using a comb filter to filter the measured current, determining whether the filtered, measured current is less than a predetermined threshold value; and generating an alarm indication that the high voltage side of the standby power transformer is unconnected.

Abstract: An internal combustion engine has two exhaust valves (24, 25) per combustion chamber (21), and variable valve timing for each exhaust valve. The exhaust valves (24, 25) are associated with respective exhaust tracts (26, 27) including a turbocompounder (31) and a turbocharger (41). The turbine exhaust from one of the turbomachines is directed to turbine inlet of another of the turbomachines.

Abstract: An internal combustion engine (20) has two exhaust valves (24, 25) for each combustion chamber, to permit separation of blow-down and expulsion phases of an exhaust stroke. The separate exhaust streams are directed to different geometries of an exhaust turbocharger (30), so as to make best use thereof. Variable exhaust valve timing, and bypass passage for the exhaust streams are disclosed.

Abstract: Systems and methods for dynamically sizing inter-kernel communication channels implemented on an integrated circuit (IC) are provided. Implementation characteristics of the channels, predication, and kernel scheduling imbalances may factor into properly sizing the channels for self-synchronization, resulting in optimized steady-state throughput.

Abstract: Systems and methods according to these exemplary embodiments provide for methods and systems related to optical current sensors used to monitor standby power transformers, specifically fiber optical current and voltage sensors and, more particularly, to applications involving filters for use in such sensors, such as frequency tracking comb filters. According to one embodiment, a method for monitoring a connection condition of a stand by power transformer includes the steps of measuring a current flowing through a high voltage side of the standby power transformer using at least one optical current sensor disposed proximate to a current flow path of the high voltage side, using a comb filter to filter the measured current, determining whether the filtered, measured current is less than a predetermined threshold value; and generating an alarm indication that the high voltage side of the standby power transformer is unconnected.

Abstract: An internal combustion engine (20) has two exhaust valves (24, 25) for each combustion chamber, to permit separation of blow-down and expulsion phases of an exhaust stroke. The separate exhaust streams are directed to different geometries of an exhaust turbocharger (30), so as to make best use thereof. Variable exhaust valve timing, and bypass passage for the exhaust streams are disclosed.

Abstract: An internal combustion engine has two exhaust valves (24, 25) per combustion chamber (21), and variable valve timing for each exhaust valve. The exhaust valves (24, 25) are associated with respective exhaust tracts (26, 27) including a turbocompounder (31) and a turbocharger (41). The turbine exhaust from one of the turbomachines is directed to turbine inlet of another of the turbomachines.

Abstract: A cadmium- and zinc-hyperaccumulating subspecies from Thlaspi caerulescens and methods for removing and optionally recovering cadmium and zinc from soil using phytoextracting techniques wherein the subspecies is cultivated on soil containing cadmium and zinc.

Abstract: A connection system is provided for facilitating a downhole electrical reservoir monitoring and/or control system operated by a surface system. The connector system includes a set of fuses and a fuse blowing circuit for isolating a short circuit event and restoring functionality to the remaining components of the downhole system.

Abstract: A connection system is provided for facilitating a downhole electrical reservoir monitoring and/or control system operated by a surface system. The connector system includes a set of fuses and a fuse blowing circuit for isolating a short circuit event and restoring functionality to the remaining components of the downhole system.

Abstract: Circuitry for locking out a first signal generated from a first power supply while the first power supply is at or below a first voltage level is described for a non-volatile semiconductor memory. The circuitry includes a first P-type transistor P1 having a gate, a drain, and a source. The source of P1 is coupled to a second power supply, the drain of P1 is coupled to a first node and the gate of P1 is coupled to a second node. The second node provides an output signal representative of the first control signal. The circuitry also includes a first N-type transistor N1, having a gate, a drain, and a source. The drain of N1 is coupled to the first node, the source of N1 is coupled to a third, and the gate of N1 is coupled to the first control signal and to a fourth node. Included is a second N-type transistor N2, having a drain, a source and a gate. The gate of N2 is coupled a sixth node. The drain of N2 is coupled to the second node and the source of N2 is coupled to the third node.

Abstract: A semiconductor flash EPROM/EEPROM device which includes a command port controller for receiving command instructions from a data bus coupled to the memory device. Instruction words to a command port controller operates to instruct the device to perform read, erase, program, or verify functions and the command port controller generates necessary control signals to cause the memory to function appropriately. By utilizing the command port controller the memory device can be erased and programmed while the device is in the circuit and permits pin compatibility with the prior art EPROM and EEPROMs.

Abstract: A semiconductor flash EPROM/EEPROM device which includes a command port for receiving instruction on a data line and providing control signals to a memory for providing program and erase functions, a method to program and erase the memory. A program sequence is comprised of setting up a program command during a first write cycle, preforming a second write cycle to load address to address register and data to to a data register, programming during a program cycle and writing a program verify command during a third write cycle to verify the programmed data during a read cycle. An erase sequence is comprised of writing a setup erase command during a first write cycle, an erase command during a second write cycle providing the erasure during an erase cycle, writing the erase verify command during a third write cycle which also addresses the address of the memory and providing erase verification during a read cycle. Both the erase and program cycles provide for measured incremental erasing and programming.