Patents by Inventor Alan Bawden

Alan Bawden has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6003077
    Abstract: A standard SNMP management station is replaced by a client computer having a standard Web browser while utilizing the services of a Web/SNMP proxy agent in accordance with the present invention. The Internet locations of the ASN.1 specifications for various MIB modules, as well as other information resources associated with those MIB modules, are stored in resource records in a section of the DNS established for storing such information. The Web/SNMP proxy agent automatically locates the ASN.1 specification for each MIB module of any identified SNMP agent, by looking up the location in the DNS. The Web/SNMP proxy agent then compiles the ASN.1 MIB module specifications into HTML documents for viewing on the client computer. User requests for retrieving data from specified MIB objects and/or for sending data values to specified MIB objects are communicated from the client computer to the Web/SNMP proxy agent using standard HTTUP communications.
    Type: Grant
    Filed: September 15, 1997
    Date of Patent: December 14, 1999
    Assignee: Integrated Systems, Inc.
    Inventors: Alan Bawden, Shawn A. Routhier, S. Robert Austein, Lowell S. Gilbert
  • Patent number: 4709327
    Abstract: A parallel processing circuit is disclosed for use as the processor/memory in a highly parallel processor. The circuit comprises an instruction decoder that generates tables of outputs in response to instructions received at the decoder and a plurality of processor/memories each of which comprises a read/write memory and a processor for producing an output depending at least in part on data read from the memory and instruction information received at the instruction decoder. In addition, the circuit provides means for simultaneously addressing at least one cell in each read/write memory to write data thereto or read data therefrom and means for providing to each processor an output table from the decoder, the particular output table depending on instruction information received at the decoder. Further the processing circuit comprises means for selecting from the output table a particular output depending on data input to the processor.
    Type: Grant
    Filed: May 31, 1983
    Date of Patent: November 24, 1987
    Inventors: W. Daniel Hillis, Thomas F. Knight, Jr., Alan Bawden, Brewster L. Kahle, David Chapman, David P. Christman, Cliff A. Lasser, Carl R. Feynman