Abstract: A BiCMOS method for forming bipolar junction transistors and CMOS devices in a substrate. To avoid erosion of the bipolar junction transistor material layers, gate spacers for the CMOS devices are formed while a bipolar junction transistor photoresist layer is in place. The photoresist layer is used for etching the emitter polysilicon layer (for single polysilicon layer bipolar junction transistors) or for etching the base polysilicon layer (for double polysilicon layer bipolar junction transistors) prior to gate spacer etch.

Abstract: An integrated circuit having an n-channel MOSFET device and a JFET device. The integrated circuit includes a semiconductor layer having an upper surface, an MOS transistor device formed in a doped well of a first conductivity type extending from the semiconductor upper surface and a JFET device. The JFET device includes a channel region in the semiconductor layer spaced from, and having a peak concentration positioned a predetermined distance below, the upper surface. An associated method of manufacturing includes introducing p-type dopant into the semiconductor surface to form a p-well in which the NMOS device is formed and a source and a drain of the JFET device. N-type dopant is introduced into the semiconductor surface to form an n-type region of the NMOS device below the p-well and a gate region of the JFET device.

Abstract: A BiCMOS method for forming bipolar junction transistors and CMOS devices in a substrate. To avoid erosion of the bipolar junction transistor material layers, gate spacers for the CMOS devices are formed while a bipolar junction transistor photoresist layer is in place. The photoresist layer is used for etching the emitter polysilicon layer (for single polysilicon layer bipolar junction transistors) or for etching the base polysilicon layer (for double polysilicon layer bipolar junction transistors) prior to gate spacer etch.

Abstract: The present invention provides a solution for long master bit lines in a large capacity memory device. A master bit line is partitioned by at least one switching transistor placed on the master bit line.

Abstract: A resistor formed on a material layer of a semiconductor integrated circuit and a method for forming the resistor. The resistor comprises a region of resistive material with a plurality of conductive contacts or plugs in electrical contact with and extending away from the resistive material. A first and a second interconnect line are formed overlying the plugs and in conductive contact with one or more of the plurality of plugs, such that a portion of the resistive material between the first and the second interconnect lines provides a desired resistance. According to a method of the present invention, the plurality of conductive contacts are formed using a first photolithographic mask and the first and the second interconnect lines are formed using a second photolithographic mask. The desired resistance is changed by modifying the first or the second mask such that one or more dimensions of a region of the resistive material between the first and the second interconnect lines is altered.

Abstract: A semiconductor manufacturing method comprises forming a leveling guard ring defining an interior area into which are fabricated one or more devices. In certain embodiments two or more matched devices, such as in a common centroid layout, are fabricated in the interior area. The guard ring is formed on at least one particular layer for a particular processing step. By the guard ring overwhelming the effect of local features' elevation differences, photoresist thereafter applied consequently has a more uniform height across the interior area, resulting in more uniform devices. In some embodiments, a plurality of guard rings enclosing respective arrays of matched devices are arranged over the surface of a semiconductor wafer, spaced apart so as to be not local to one another. Based on the equalizing effect by each of the guard rings, the respective devices arranged in the interior areas are more evenly matched to equivalent devices in far-spaced guard rings. Thus, both local and global matching are achieved.

Abstract: A thermally conductive structure for a semiconductor integrated circuit and a method for making the structure. The structure comprises one or more vertical and/or horizontal thermally conductive elements disposed proximate a device for improving thermal conductivity from the device to a substrate of the integrated circuit. In one embodiment a heat sink is affixed to the integrated circuit for heat flow from the integrated circuit. The method comprises forming openings in material layers overlying the semiconductor substrate, wherein the openings are disposed proximate the device and extend to the substrate. A thermally conductive material is formed in the openings to provide a thermal path from the device to the substrate.

Abstract: A process for forming an emitter for a bipolar junction transistor and a bipolar junction transistor formed according to the process. In one embodiment, the bipolar junction transistor comprises in stacked relation a collector, an intrinsic base, an extrinsic base and an emitter. The emitter is formed by defining an opening in material layers forming the extrinsic base and selectively depositing silicon in the opening. The silicon is doped in situ or by an implant process. In another embodiment lacking an extrinsic base the opening is formed in dielectric material layers overlying the intrinsic base.

Abstract: The present invention relates to a remote computer or server management system for coupling a series of remote computers to one or more user workstations allowing for efficient location, error detection and/or general status indication of the remote computers or servers. In particular, computer interface modules connected to the remote computers or servers include a signaling circuit to emit an audible or visual signal upon detection of a problem or upon receipt of a signal command from a user trying to locate a particular remote computer. Alternatively, the signaling circuit may transmit a message to the user workstation to inform the user of a problem, general status (e.g., of firmware upgrade), etc., which may be displayed on the user's video monitor.

Abstract: A method and apparatus for mounting an electronic component within a rack system is provided comprising a modular equipment rack bracket for electronic equipment including a first and second mounting bracket arm for mounting to a rack assembly and a frame member for supporting a plurality of electrical supply cabling, signal cabling or data cabling and the like. The first and second mounting bracket arms are affixed to the front of the rack assembly and have associated therewith a plurality of fastener openings for attaching electronic components thereto. The frame member is coupled to one of a plurality of coupling means of the first and second mounting bracket arms allowing the electronic component to be affixed to the mounting bracket in either a front-facing forward configuration or a rear-facing forward configuration without removing the affixed first and second mounting bracket arms from the rack assembly.

Abstract: According to the present disclosure, a digital vehicle microphone system for recording and playback of announcements pertaining to vehicle stops and route information is provided for use over public address systems installed on public transportation vehicles. The system includes a microphone apparatus for digitally pre-recording the announcements. The microphone apparatus includes a microphone, a mute switch, a radio mode switch, a record switch and a record indicator. The system also includes a control circuit for recording and storing at least two separate announcements onto memory storage devices. The control circuit further includes a delayed playback feature for delayed playback of the announcements through the vehicle's public address system. The microphone apparatus further includes a “hands free” microphone including hand and foot actuated recording switches.

Abstract: A method and apparatus for mounting an electronic component within a housing is provided comprising a modular equipment rack bracket for electronic equipment including a first and second mounting bracket arm for mounting to a housing rack assembly and a frame member for supporting a plurality of electrical supply cabling, signal cabling or data cabling and the like. The first and second mounting bracket arms are affixed to the front of the housing rack assembly and have associated therewith a plurality of fastener openings for attaching electronic components thereto. The frame member is coupled to one of a plurality of coupling means of the first and second mounting bracket arms allowing the electronic component to be affixed to the mounting bracket in either a front-facing forward configuration or a rear-facing forward configuration without removing the affixed first and second mounting bracket arms from the rack housing assembly.

Abstract: An improvement in binding clip, which includes two symmetric clamping elements pivoted with two positioning plates mounted with two dove-tail slide blocks mounted thereon, and sheets of paper retained therein between the two symmetric clamping elements, whereby the amount of the sheets of paper can be flexibly increased or reduced according to requirement, and whereby the clampng elements each has two interconnected elastic strips to define a clearance with its back wall portion for mounting a cover page. Therefore, the assembly can be conveniently set up without the use of any working tool, functional flexibility can be for choice and low manufacturing cost can be achieved.